SSC2117 View Datasheet(PDF) - Secos Corporation.

Part Name

Description

Manufacturer

SSC2117

750mA CMOS Positive Voltage Regulator

Secos Corporation. 

Elektronische Bauelemente

SSC2117

750mA CMOS

Positive Voltage Regulator

Ordering Information(contd.)

Part Number

SSC2117-AD

Marking

7AAD2

XXXX

Output Voltage

Adjustable

Part Number

Marking

Output Voltage

Detailed Description

The SSC2117 of COMS regulators contain a PMOS pass transistor,voltage reference, error amplifier,over-current protection and thermal

shutdown.The P-channel pass transistor receives data from the error amplifier, over-current shutdown, and thermal protection circuits.

During normal operation, the error amplifier compares the output voltage to a precision reference. Over-current and Thermal shutdown circuits

become active when the junction temperature exceeds140oC, or the current exceeds 2.2A.During thermal shutdown, the output voltage

remains low. Normal operation is restored when the junction temperature drops below 120oC.The SSC2117 behaves like a current

source when the load reaches 2.2A. However, if the load impedance drops below 0.3ohms, the current drops back to 600mA to prevent

excessive power dissipation. Normal operation is restored when the load resistance exceeds of 0.75ohms.

External Capacitors

The SSC2117 is stable with an output capacitance to ground of 4.7uF or greater. Ceramic capacitors have the lowest ESR, and will

offer the best AC performance. Conversely, Aluminum Electrolytic capacitors exhibit the highest ESR, resulting in the poorest AC

response. Unfortunately, large value ceramic capacitors are comparatively expensive. One option is to parallel a 0.1uF ceramic

capacitor with a 10uF Aluminum Electrolytic. The benefit is low ESR, high capacitance, and low overall cost. A second capacitor is

recommended between the input and ground to stabilize VIN. The input capacitor should be at least 0.1uF to have a beneficial

effect. All capacitors should be placed in closed proximity to the pins. A "Quiet" ground termination is desirable. This can be

achieved with a "Star" connection.

Enable

When EN pin is pulled low, the PMOS pass transistor shuts off, and all internal circuits are powered down. In this state, the quiescent

current is less than 2uA. This pin behaves much like an electronic switch. 100KΩ resistor is necessary between VEN source and EN

pin when VEN is high than VIN. (Note: There is no internal pull-up for EN pin. It can not be floating.)

Adjustable Version

The adjustable version uses external feedback resistors to generate an output voltage anywhere from 1.5V to 5.0V. Vadj is trimmed to

1.24V and Vout is given by the equation:

VOUT=Vadj*(1+R1/R2)

Feedback resistors R1 and R2 should be high enough to keep quiescent current low, but increasing R1+R2 will reduce stability. In general,

R1 and R2 in the 10's of kΩ will produce adequate stability, given reasonable layout precautions. To improve stability characteristics,

keep parasitic on the ADJ pin to min., and lower R1 and R2 values.

ht tp://www.SeCoSGmbH.com/

01-Jun-2002 Rev. A

Any changing of specification will not be informed individual

Page 3 of 7

Share Link: