SST25VF020 View Datasheet(PDF) - Silicon Storage Technology
Part Name
Description
Manufacturer
SST25VF020 Datasheet PDF : 23 Pages
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2 Mbit SPI Serial Flash
SST25VF020
Write-Enable (WREN)
The Write-Enable (WREN) instruction sets the Write-
Enable-Latch bit to 1 allowing Write operations to occur.
The WREN instruction must be executed prior to any Write
(Program/Erase) operation. CE# must be driven high
before the WREN instruction is executed.
CE#
MODE 3
SCK MODE 0
0 1 2345 6 7
SI
06
MSB
SO
HIGH IMPEDANCE
1231 F11.1
FIGURE 12: Write Enable (WREN) Sequence
Write-Disable (WRDI)
The Write-Disable (WRDI) instruction resets the Write-
Enable-Latch bit and AAI bit to 0 disabling any new Write
operations from occurring. CE# must be driven high before
the WRDI instruction is executed.
CE#
MODE 3
SCK MODE 0
0 1 2345 6 7
SI
04
MSB
SO
HIGH IMPEDANCE
1231 F12.1
FIGURE 13: Write Disable (WRDI) Sequence
Enable-Write-Status-Register (EWSR)
The Enable-Write-Status-Register (EWSR) instruction
arms the Write-Status-Register (WRSR) instruction and
opens the status register for alteration. The Enable-Write-
Status-Register instruction does not have any effect and
will be wasted, if it is not followed immediately by the Write-
Status-Register (WRSR) instruction. CE# must be driven
low before the EWSR instruction is entered and must be
driven high before the EWSR instruction is executed.
©2006 Silicon Storage Technology, Inc.
13
Data Sheet
S71231-07-000
10/06
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