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SST25VF020B View Datasheet(PDF) - Silicon Storage Technology

Part Name
Description
Manufacturer
SST25VF020B
SST
Silicon Storage Technology SST
SST25VF020B Datasheet PDF : 33 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
2 Mbit SPI Serial Flash
SST25VF020B
Power-up
Write-Disable (WRDI) instruction completion
Byte-Program instruction completion
Auto Address Increment (AAI) programming is
completed or reached its highest unprotected
memory address
Sector-Erase instruction completion
Block-Erase instruction completion
Chip-Erase instruction completion
Write-Status-Register instructions
Auto Address Increment (AAI)
The Auto Address Increment Programming-Status bit pro-
vides status on whether the device is in AAI programming
mode or Byte-Program mode. The default at power up is
Byte-Program mode.
Data Sheet
Block Protection (BP1, BP0)
The Block-Protection (BP1, BP0) bits define the size of the
memory area, as defined in Table 5, to be software pro-
tected against any memory Write (Program or Erase)
operation. The Write-Status-Register (WRSR) instruction
is used to program the BP1 and BP0 bits as long as WP#
is high or the Block-Protect-Lock (BPL) bit is 0. Chip-Erase
can only be executed if Block-Protection bits are all 0. After
power-up, BP1 and BP0 are set to 1.
Block Protection Lock-Down (BPL)
WP# pin driven low (VIL), enables the Block-Protection-
Lock-Down (BPL) bit. When BPL is set to 1, it prevents any
further alteration of the BPL, BP1, and BP0 bits of the sta-
tus register and BSP and TSP of Status Register 1. When
the WP# pin is driven high (VIH), the BPL bit has no effect
and its value is “Don’t Care”. After power-up, the BPL bit is
reset to 0.
TABLE 5: Software Status Register Block Protection FOR SST25VF020B1
Status Register Bit2
Protected Memory Address
Protection Level
BP1
BP0
2 Mbit
0
0
0
None
1 (1/4 Memory Array)
0
1
030000H-03FFFFH
1 (1/2 Memory Array)
1
0
020000H-03FFFFH
1 (Full Memory Array)
1
1
000000H-03FFFFH
1. X = Don’t Care (RESERVED) default is “0
2. Default at power-up for BP1 and BP0 is ‘11’. (All Blocks Protected)
T5.0 1417
Top-Sector Protection/Bottom-Sector Protection
The Top-Sector Protection (TSP) and Bottom-Sector Pro-
tection (BSP) bits independently indicate whether the high-
est and lowest sector locations are Write locked or Write
accessible. When TSP or BSP is set to ‘1’, the respective
sector is Write locked; when set to ‘0’ the respective sector
is Write accessible. If TSP or BSP is set to '1' and if the top
or bottom sector is within the boundary of the target
address range of the program or erase instruction, the initi-
ated instruction (Byte-Program, AAI-Word Program, Sec-
tor-Erase, Block-Erase, and Chip-Erase) will not be
executed. Upon power-up, the TSP and BSP bits are auto-
matically reset to ‘0’.
©2010 Silicon Storage Technology, Inc.
7
S71417-02-000
04/10

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