MCP3201
CS
CLK
DOUT
tSUCS
HI-Z
tHI tLO
tEN
tDO
tR
NULL BIT MSB OUT
FIGURE 1-1:
Serial Timing.
tCSH
tDIS
tF
LSB
HI-Z
Load circuit for tR, tF, tDO
1.4V
DOUT
3 kΩ Test Point
CL = 30 pF
Load circuit for tDIS and tEN
DOUT
Test Point
3 kΩ
VDD
VDD/2
tDIS Waveform 2
tEN Waveform
30 pF
VSS
tDIS Waveform 1
Voltage Waveforms for tR, tF
DOUT
tR
VOH
VOL
tF
Voltage Waveforms for tDO
CLK
tDO
DOUT
FIGURE 1-2:
Test Circuits.
© 2008 Microchip Technology Inc.
Voltage Waveforms for tEN
CS
123 4
CLK
DOUT
B9
tEN
Voltage Waveforms for tDIS
CS
VIH
DOUT
Waveform 1*
DOUT
Waveform 2†
90%
tDIS
10%
* Waveform 1 is for an output with internal condi-
tions such that the output is high, unless disabled
by the output control.
† Waveform 2 is for an output with internal condi-
tions such that the output is low, unless disabled
by the output control.
DS21290E-page 5