PIC16C6X
TABLE 4-2: SPECIAL FUNCTION REGISTERS FOR THE PIC16C62/62A/R62 (Cont.’d)
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR,
BOR
Value on
all other
resets(3)
Bank 1
80h(1) INDF
Addressing this location uses contents of FSR to address data memory (not a physical register) 0000 0000 0000 0000
81h
OPTION
RBPU INTEDG T0CS
T0SE
PSA
PS2
PS1
PS0 1111 1111 1111 1111
82h(1) PCL
Program Counter's (PC) Least Significant Byte
0000 0000 0000 0000
83h(1) STATUS
IRP(5)
RP1(5)
RP0
TO
PD
Z
DC
C
0001 1xxx 000q quuu
84h(1) FSR
Indirect data memory address pointer
xxxx xxxx uuuu uuuu
85h
TRISA
—
— PORTA Data Direction Register
--11 1111 --11 1111
86h
TRISB
PORTB Data Direction Register
1111 1111 1111 1111
87h
TRISC
PORTC Data Direction Register
1111 1111 1111 1111
88h
—
Unimplemented
—
—
89h
—
Unimplemented
—
—
8Ah(1,2) PCLATH
—
—
— Write Buffer for the upper 5 bits of the Program Counter
---0 0000 ---0 0000
8Bh(1) INTCON
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF 0000 000x 0000 000u
8Ch
PIE1
(6)
(6)
—
—
SSPIE CCP1IE TMR2IE TMR1IE 00-- 0000 00-- 0000
8Dh
—
Unimplemented
—
—
8Eh
PCON
—
—
—
—
—
—
POR
BOR(4) ---- --qq ---- --uu
8Fh
—
Unimplemented
—
—
90h
—
Unimplemented
—
—
91h
—
Unimplemented
—
—
92h
PR2
Timer2 Period Register
1111 1111 1111 1111
93h
SSPADD Synchronous Serial Port (I2C mode) Address Register
0000 0000 0000 0000
94h
SSPSTAT
—
—
D/A
P
S
R/W
UA
BF --00 0000 --00 0000
95h-9Fh
—
Unimplemented
—
—
Legend:
Note 1:
2:
3:
4:
5:
6:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented location read as '0'.
Shaded locations are unimplemented, read as ‘0’.
These registers can be addressed from either bank.
The upper byte of the Program Counter (PC) is not directly accessible. PCLATH is a holding register for the PC whose
contents are transferred to the upper byte of the program counter. (PC<12:8>)
Other (non power-up) resets include external reset through MCLR and the Watchdog Timer reset.
The BOR bit is reserved on the PIC16C62, always maintain this bit set.
The IRP and RP1 bits are reserved on the PIC16C62/62A/R62, always maintain these bits clear.
PIE1<7:6> and PIR1<7:6> are reserved on the PIC16C62/62A/R62, always maintain these bits clear.
© 1997 Microchip Technology Inc.
DS30234D-page 25