SST49LF004B View Datasheet(PDF) - Silicon Storage Technology
Part Name
Description
Manufacturer
SST49LF004B Datasheet PDF : 36 Pages
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EOL Data Sheet
DEVICE MEMORY MAP
4 Mbit Firmware Hub
SST49LF004B
TBL#
WP#
Block 0-6
Block 7
Block 6
Block 5
Block 4
Block 3
Block 2
Block 1
7FFFFH
70000H
6FFFFH
60000H
5FFFFH
50000H
4FFFFH
40000H
3FFFFH
30000H
2FFFFH
20000H
1FFFFH
10000H
0F000H
Block 0
(64 KByte)
02000H
01000H
00000H
FIGURE 3: DEVICE MEMORY MAP
Boot Block
4 KByte Sector 2
4 KByte Sector 1
4 KByte Sector 0
1307 F02.0
DESIGN CONSIDERATIONS
SST recommends a high frequency 0.1 µF ceramic capac-
itor to be placed as close as possible between VDD and
VSS less than 1 cm away from the VDD pin of the device.
Additionally, a low frequency 4.7 µF electrolytic capacitor
from VDD to VSS should be placed within 1 cm of the VDD
pin. If a socket is used for programming purposes, an addi-
tional 1-10 µF should be added next to each socket.
The RST# and INIT# pins must remain stable at VIH for the
entire duration of an Erase or Program operation. WP#
must remain stable at VIH for the entire duration of the
Erase and Program operations for non-Boot Block sectors.
To write data to the top Boot Block sectors, the TBL# pin
must also remain stable at VIH for the entire duration of the
Erase and Program operations.
PRODUCT IDENTIFICATION
The Product Identification mode identifies the device as the
SST49LF004B and manufacturer as SST.
TABLE 2: PRODUCT IDENTIFICATION
Address
Data
PP Mode LPC Mode1
Manufacturer’s ID 0000H
FFBC 0000H BFH
Device ID2
SST49LF004B 0001H
FFBC 0001H 60H
T2.0 1307
1. Address shown in this column is for boot device only.
Address locations should appear elsewhere in the 4
GByte system memory map depending on ID strapping
values on ID[3:0] pins when multiple LPC memory
devices are used in a system.
2. The device ID for SST49LF004B is the same as
SST49LF004A.
©2007 Silicon Storage Technology, Inc.
10
S71307-03-EOL
12/07
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