ST72324J2TC View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

ST72324J2TC

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE

STMicroelectronics 

ST72324

1 INTRODUCTION

The ST72324K and ST72324J devices are mem-

bers of the ST7 microcontroller family. They can

be grouped as follows:

– The 32-pin ST72324K devices are designed for

mid-range applications

– The 42/44-pin ST72324J devices target the

same range of applications requiring more than

24 I/O ports.

All devices are based on a common industry-

standard 8-bit core, featuring an enhanced instruc-

Figure 1. Device Block Diagram

tion set and are available with FLASH or ROM pro-

gram memory.

Under software control, all devices can be placed

in WAIT, SLOW, ACTIVE-HALT or HALT mode,

reducing power consumption when the application

is in idle or stand-by state.

The enhanced instruction set and addressing

modes of the ST7 offer both power and flexibility to

software developers, enabling the design of highly

efficient and compact application code. In addition

to standard 8-bit data management, all ST7 micro-

controllers feature true bit manipulation, 8x8 un-

signed multiplication and indirect addressing

modes.

RESET

VPP

VSS

VDD

OSC1

OSC2

PF7:6,4,2:0

(6 bits on J devices)

(5 bits on K devices)

PE1:0

(2 bits)

PD5:0

(6 bits on J devices)

(2 bits on K devices)

VAREF

VSSA

8-BIT CORE

ALU

CONTROL

LVD

OSC

MCC/RTC/BEEP

PORT F

TIMER A

BEEP

PORT E

SCI

PORT D

10-BIT ADC

PROGRAM

MEMORY

(8K - 60K Bytes)

RAM

(384 - 2048 Bytes)

WATCHDOG

PORT A

PORT B

PORT C

TIMER B

SPI

PA7:3

(5 bits on J devices)

(4 bits on K devices)

PB4:0

(5 bits on J devices)

(3 bits on K devices)

PC7:0

(8 bits)

7/161

3

Share Link: