ST8009 View Datasheet(PDF) - Sitronix Technology Co., Ltd.
Part Name
Description
Manufacturer
ST8009 Datasheet PDF : 43 Pages
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ST8009
EIO1, EIO2
CS0~CS95
CAP1-
CAP1+
CAP2-
CAP2+
CAP3+
CAP4+
VOUT
SID
SCLK
Input/output pins for chip selection.
When L/R register is set ‘0’ , EIO1 is set for output, and EIO2 is set for input(connect to VSS).
When L/R register is set ‘1’, EIO1 is set for input(connect to VSS), and EIO2 is set for output.
During output, set to "H" while LP • XCK is "H" and after 96 bits of data have been read, set
to "L” for one cycle (from falling edge to failing edge of XCK), after which it returns to "H".
During input, the chip is selected while El is set to "L" after the LP signal is input. The chip is
non-selected after 96 bits of data have been read.
LCD drive output pins
Corresponding directly to each bit of the data latch, one level (V0, V2 ,V3, VSS) is selected and
output.
Table of truth values is shown in "TRUTH TABLE" in Functional Operations.
DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2- terminal.
DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1- terminal.
DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2- terminal.
DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2- terminal.
DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1- terminal.
DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2- terminal.
DC/DC voltage converter. Connect a capacitor between this terminal and VSS.
The serial command data. See Figure1
The serial clock input. See Figure1
(Common mode)
SYMBOL
FUNCTION
VDD
Logic system power supply pin, connected to +2.5 to +5.5 V.
VSS
Ground pin, connected to 0 V.
When the internal power supply circuit turns on
The internal power supply circuit will produce the LCD bias voltage set( V0 ~ V4 ), and those
V0, V1
V2, V3
V4
voltages are setting by the “LCD Bias Set” register.
When the internal power supply circuit turns off
Supply the bias voltages set by a resistor divider externally , and had better use follower circuit to
hold those voltages.
Ensure that voltages are set such that V0 ≧V1 ≧V2 ≧V3 ≧V4 ≧VSS
DI3-DI0
LP2
XCK
Not used. Connect DI3-DI0 to VSS, not floating.
Shift clock pulse input pin for bi-directional shift register
* Data is shifted at the falling edge of the clock pulse.
When use gray scale mode, then must use the pin.
When use monochrome mode, then the pin should be shorted to LP1.
Not used
Not let it floating , connect to VSS
V1.1
9/43
2006/11/1
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