STM32F030C8(2013) View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STM32F030C8
(Rev.:2013)

Value-line ARM®-based 32-bit MCU with up to 256-KB Flash, timers, ADC, communication interfaces, 2.4-3.6 V operation

STMicroelectronics 

STM32F030x4 STM32F030x6 STM32F030x8

Functional overview

3.4

Cyclic redundancy check calculation unit (CRC)

The CRC (cyclic redundancy check) calculation unit is used to get a CRC code from a 32-bit

data word and a CRC-32 (Ethernet) polynomial.

Among other applications, CRC-based techniques are used to verify data transmission or

storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of

verifying the Flash memory integrity. The CRC calculation unit helps compute a signature of

the software during runtime, to be compared with a reference signature generated at link-

time and stored at a given memory location.

3.5

3.5.1

3.5.2

3.5.3

Power management

Power supply schemes

 VDD = 2.4 to 3.6 V: external power supply for I/Os and the internal regulator. Provided

externally through VDD pins.

 VDDA = 2.4 to 3.6 V: external analog power supply for ADC, Reset blocks, RCs and

PLL. The VDDA voltage level must be always greater or equal to the VDD voltage level

and must be provided first.

For more details on how to connect power pins, refer to Figure 10: Power supply scheme.

Power supply supervisors

The device has integrated power-on reset (POR) and power-down reset (PDR) circuits.

They are always active, and ensure proper operation above a threshold of 2 V. The device

remains in reset mode when the monitored supply voltage is below a specified threshold,

VPOR/PDR, without the need for an external reset circuit.

 The POR monitors only the VDD supply voltage. During the startup phase it is required

that VDDA should arrive first and be greater than or equal to VDD.

 The PDR monitors both the VDD and VDDA supply voltages, however the VDDA power

supply supervisor can be disabled (by programming a dedicated Option bit) to reduce

the power consumption if the application design ensures that VDDA is higher than or

equal to VDD.

Voltage regulator

The regulator has three operating modes: main (MR), low power (LPR) and power down.

 MR is used in normal operating mode (Run)

 LPR can be used in Stop mode where the power demand is reduced

 Power down is used in Standby mode: the regulator output is in high impedance: the

kernel circuitry is powered down, inducing zero consumption (but the contents of the

registers and SRAM are lost)

This regulator is always enabled after reset. It is disabled in Standby mode, providing high

impedance output.

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