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STSR30 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
STSR30 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Figure 1 : TIMING DIAGRAM
STSR30
Figure 2 : STSR30 IN FLYBACK CONVERTER SECONDARY SIDE
Feedback
Loop
TRANSFORMER
Vi
PWM
MosfetN
Cout
C1
100nF
Vo
+5V
+5V R3
D3
8 Ck STSR30
1 INHIBIT
C2
100nF
SGLGND 3
R1
SETANT 7
R2
R5
D1
option
D2 +5V
Low = OFF
High = ON
NOTES
1) Ceramic Capacitors C1 and C2 must be placed very close to the IC;
2) R1 and R2 set the anticipation time by partitioning the VCC voltage;
3) R3 is a pull-up resistor;
4) R5 limits the current flowing through diode D2 when Freewheeling drain voltage is high;
5) D1 could be necessary to protect INHIBIT pin from negative voltages.
6) D2 could be necessary to protect INHIBIT pin from voltages higher than VCC
7) SGLGND layout trace must not include OUTGATE current paths.
5/10

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