STV0042 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STV0042

STV0042/STV0056 APPLICATION NOTE

STMicroelectronics 

STV0042/STV0056 APPLICATION NOTE

3 - APPLICATION NOTES (continued)

Figure 5 : Video De-emphasis Amplifier

12V (VDD)

VC

Option

Q VCE

Z1

Z2

VE

R11 C13

C12

R10

VIDEEM1

R9

R15

LPF

UNCL DEEM

R16

To Clamping

Stage

B-BAND

3.1.2 - Breaking down the Video Matrix Section

3.1.2.1 - Clamp Stage

All the video inputs of the video matrix feature the

same clamp stage. The purposeof the clamp stage

is to reject the energy dispersal ramp and to ensure

a stable DC level at all video outputs (easier inter-

face with decoder or text insertion circuits).

The coupling capacitor value is only critical for the

rejection of the energy dispersal ramp (C11 in the

application diagram).

The principle of the clamp stage is : DC alignment

of the synchronization top bottom level. The cou-

pling capacitor C11 is charged with a high current I2

when the input level is lower than 2.7V and is

permanently discharged by a small I1 current

(see Figure 6).

Dimensionning the Coupling Capacitor C11

C11 is dimensionned for the largest ramp amplitude

AR which can be measured at the output of the low

pass filter :

AR

max.

=

A

⋅

G

⋅ GDEEM

2

A : amplitude of the ramp at the tuner output

G : gain of the input stage

GDEEM : gain of the de-emphasis amplifier (at 25

or 30Hz)

This worst case of the ramp produces a positive or

negative voltage offset ∆ at each line :

∆ = ARmax. (625 lines) or ∆ = ARmax. (525 lines)

312.5

262.5

6/37

To reject the Slope :

The I1 current must produce a negative ramp in

C11 which compensate the positive ramp of the

energy dispersal sawtooth :

C11

≤

I1 Min.

∆Max.

⋅

T

(1)

Additionnaly the I2 current of the circuit is choosen

to produces enough charge during the synchro

pulse of the negative slopes of the energy dispersal

ramp.

I2 Min. ≥

C11

⋅

∆+

TS

I1

⋅

T

(2)

Results :

For a worst case of a 4MHz pp ramp added to a

16MHz/V channel

ARMax. = 1.25VPP ⇒ ∆Max. = 4.0mV

(1)

⇒

C11

≤

0.5µA,

4mV

C11 ≈ 8.2nF

(2) ⇒ Required I2 Min. > 28µA,

Actual I2 Min. = 40µA

(specification of STV42/56)

Remarks :

- It is important not to use a too small C11 value.

A low C11 value would induce a degradation of

the TILT parameter (parasitic slope on the

clamped video). Additionnaly, in case of built-in

Videocrypt receiver, a parasitic slope would pro-

duce a voltage offset at the ”cut and rotate” point.

- For a good operation, the DC impedance of point

A (see Figure 6) must be as low as possible.

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