15 W C-BAND Po GaAs FET NEZ SERIES
15W PERFORMANCE SPECIFICATIONS (TA = 25 ˚C, Zs = ZL = 50 Ω)
p1dB
GL
IDS
∆GL
IM3
ηadd
(dBm)
(dB)
PART NUMBER
*1
(A)
(dB)
(dBc)
(%) VDS
*2
*3,4
*4
MIN. TYP. MIN. TYP. TYP. MAX. MAX. TYP. MAX. TYP. (V)
NEZ3642-15D 41.5 42.5 9.0 10.0 4.8 6.0 –
–
– 35 10
NEZ3642-15DD 41.5 42.5 9.0 10.0 4.8 6.0 1.0 – –42 35 10
NEZ4450-15D 41.5 42.5 9.0 10.0 4.8 6.0 –
–
– 35 10
NEZ4450-15DD 41.5 42.5 9.0 10.0 4.8 6.0 1.0 – –42 35 10
NEZ5964-15D 41.5 42.5 8.0 9.0 4.8 6.0 –
–
– 33 10
NEZ5964-15DD 41.5 42.5 8.0 9.0 4.8 6.0 1.0 – –42 33 10
NEZ6472-15D 41.5 42.5 6.5 7.5 4.8 6.0 –
–
– 31 10
NEZ6472-15DD 41.5 42.5 6.5 7.5 4.8 6.0 1.0 – –42 31 10
NEZ7785-15D 41.5 42.5 6.0 7.0 4.8 6.0 –
–
– 27 10
TEST CONDITIONS
IDS FREQUENCY IM3 TEST
*5 BAND
FREQ.
(A)
(GHz)
(GHz)*6
4.0
3.6 to 4.2
4.0
3.6 to 4.2
4.0
4.4 to 5.0
4.0
4.4 to 5.0
4.0 5.9 to 6.45
4.0 5.9 to 6.45
4.0
6.4 to 7.2
4.0
6.4 to 7.2
4.0
7.7 to 8.5
–
4.2
–
5.0
–
6.45
–
7.2
–
Notes *1 Output power at 1 dB gain compression point
*2 IDS values are specified at P1dB point.
*3 Gain flatness
*4 Applies to –15DD option only
*5 RF OFF
*6 IM3 test conditions: ∆ f = 10 MHz, 2 tones test, PO = 31.5 dBm (single carrier level)
MAXIMUM OPERATING LIMITS
Rg max. (Ω)
50
VDS max. (V)
10
Rg max is the maximum series resistance between the gate supply and the FET gate.
3