SAA9750H View Datasheet(PDF) - Philips Electronics
Part Name
Description
Manufacturer
SAA9750H Datasheet PDF : 24 Pages
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Philips Semiconductors
Camera Digital Signal Processor
(CAMDSP)
Preliminary specification
SAA9750H
FUNCTIONAL DESCRIPTION
The Camera Digital Signal Processor (CAMDSP) is
intended for use with a mosaic filter colour CCD.
The input signal is an 8-bit or 9-bit digitized CCD signal.
After AGC and gamma correction, clamping of the input
signal is achieved by feedback clamp level control.
In the luminance processing, symmetrical horizontal and
vertical aperture correction are carried out. Coring is also
carried out to reduce noise at LOW signal levels. In the
chrominance processing, white balance control and matrix
control is adjustable. A false colour correction circuit
reduces aliasing of high frequency input signals.
A white-clip makes the colour white at highlights.
In the encoder part, the colour encoder subcarrier is made
by the discrete time oscillator thus eliminating the use of an
extra crystal. The subcarrier frequency for PAL or NTSC is
selectable. The encoding can be in PAL or NTSC format.
The encoded signal is output via separate 8-bit
digital-to-analog converters (DACs) for luminance and
chrominance. In the event of SECAM the output is a line
sequential −(R−Y)/(B−Y) signal. A line memory interface
allows for mixing of RGB signals in the main signal.
The encoder can be bypassed completely, in this event
only the title mix is carried out before digital-to-analog
conversion.
The SSG generates all necessary timing signals. Timing
signals for external devices NTSC, PAL and SECAM are
also made. The SSG can be locked to an external video
source.
CAMDSP can operate with 510H, 670H, 720H and 768H
colour mosaic CCDs both PAL and NTSC type. In the
510H CCD application the upsampling clock is used for the
encoder part, therefore two clock frequencies (fs and 2fs)
are required.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VDDD
VDDA
Ptot
VI
VO
Tstg
Tamb
Ves
Ilatch
PARAMETER
digital supply voltage
analog supply voltage
total power dissipation
digital input voltage
digital output voltage
storage temperature
operating ambient temperature
electrostatic handling
latch-up protection current
CONDITIONS
note 1
MIN.
−0.5
−0.5
−
−0.5
−0.5
−65
−20
−2 000
100
Note
1. Equivalent to discharging a 100 pF capacitor via a 1.5 kΩ series resistor.
MAX.
+5.0
+5.0
500
VDDD + 0.5
VDDD + 0.5
+150
+70
+2 000
−
UNIT
V
V
mW
V
V
°C
°C
V
mA
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
thermal resistance from junction to ambient in free air
VALUE
57
UNIT
K/W
1996 Feb 16
7
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