TC1043 View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

TC1043

Linear Building Block – Low Power Voltage Reference with Dual Op Amp, Dual Comparator, and Shutdown Mode

Microchip Technology 

EQUATION 4-1:

RA

=

RC





-V----H----Y- 

V D D

4. Choose the rising threshold voltage for VSRC

(VTHR).

5. Calculate RB as follows:

EQUATION 4-2:

RB

=

----------------------------1------------------------------





----V----T---H----R-----

VR × RA





–--1-----

RA

–

---1----

RC

6. Verify the threshold voltages with these formu-

las:

VSRC rising:

EQUATION 4-3:

VTHR

=

(VR)(RA)

 --1-----

 RA

+

 --1-----

 RB

+

 ---1----

 RC

VSRC falling:

EQUATION 4-4:

VTHF

= VTHR –

(---R-----A----×-----V----D----D----)

RC

4.5 32.768kHz ‘Time Of Day Clock’

Crystal Controlled Oscillator

A very stable oscillator driver can be designed by using

a crystal resonator as the feedback element. Figure 4-

5 shows a typical application circuit using this tech-

nique to develop a clock driver for a Time-Of-Day

(TOD) clock chip. The value of RA and RB determines

the DC voltage level at which the comparator trips; in

this case one-half of VDD. The RC time constant of RC

and CA should be set several times greater than the

crystal oscillator’s period, which will ensure a 50% duty

cycle by maintaining a DC voltage at the inverting com-

parator input equal to the absolute average of the out-

put signal.

4.6 Non-Retriggerable One Shot Multi-

vibrator

Using two comparators, a non-retriggerable, one shot

multi-vibrator can be designed using the circuit config-

uration of Figure 4-6. A key feature of this design is that

the pulse width is independent of the magnitude of the

supply voltage because the charging voltage and the

intercept voltage are a fixed percentage of VDD. In addi-

tion, this one shot is capable of pulse width with as

much as a 99% duty cycle and exhibits input lockout to

ensure that the circuit will not re-trigger before the out-

put pulse has completely timed out. The trigger level is

© 2002 Microchip Technology Inc.

TC1043

the voltage required at the input to raise the voltage at

node A higher than the voltage at node B, and is set by

the resistive divider R4 and R10 and the impedance

network composed of R1, R2 and R3. When the one

shot has been triggered, the output of CMPTR2 is high,

causing the reference voltage at the non-inverting input

of CMPTR1 to go to VDD. This prevents any additional

input pulses from disturbing the circuit until the output

pulse has timed out.

The value of the timing capacitor C1 must be small

enough to allow CMPTR1 to discharge C1 to a diode

voltage before the feedback signal from CMPTR2

(through R10) switches CMPTR1 to its high state and

allows C1 to start an exponential charge through R5.

Proper circuit action depends upon rapidly discharging

C1 through the voltage set by R6, R9 and D2 to a final

voltage of a small diode drop. Two propagation delays

after the voltage on C1 drops below the level on the

non-inverting input of CMPTR2, the output of CMPTR1

switches to the positive rail and begins to charge C1

through R5. The time delay which sets the output pulse

width results from C1 charging to the reference voltage

set by R6, R9 and D2, plus four comparator propaga-

tion delays. When the voltage across C1 charges

beyond the reference, the output pulse returns to

ground and the input is again ready to accept a trigger

signal.

4.7 Oscillators and Pulse Width

Modulators

Microchip’s linear building block comparators adapt

well to oscillator applications for low frequencies (less

than 100kHz). Figure 4-7 shows a symmetrical square

wave generator using a minimum number of compo-

nents. The output is set by the RC time constant of R4

and C1, and the total hysteresis of the loop is set by R1,

R2 and R3. The maximum frequency of the oscillator is

limited only by the large signal propagation delay of the

comparator in addition to any capacitive loading at the

output which degrades the slew rate.

To analyze this circuit, assume that the output is initially

high. For this to occur, the voltage at the inverting input

must be less than the voltage at the non-inverting input.

Therefore, capacitor C1 is discharged. The voltage at

the non-inverting input (VH) is:

EQUATION 4-5:

VH = [---R-----2---R--+---2-(--(-R--V---1-D---|-D-|--R-)----3----)--]

where, if R1 = R2 = R3, then:

EQUATION 4-6:

VH

=

2----(---V----D----D---)-

3

DS21347B-page 7

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