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TCN75AVOA View Datasheet(PDF) - Microchip Technology

Part Name
Description
Manufacturer
TCN75AVOA
Microchip
Microchip Technology Microchip
TCN75AVOA Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Address Byte
SCL
12345 678 9
SDA
Start
A
C
1 0 0 1 A2 A1 A0
K
Address
Code
Slave
Address R/W
TCN75A Response
FIGURE 4-1:
Device Addressing.
4.1.5 DATA VALID
After the Start condition, each bit of data in
transmission needs to be settled for a time specified by
tSU-DATA before SCL toggles from low-to-high (see
“Sensor And EEPROM Serial Interface Timing
Specifications” on Page 4).
TCN75A
4.1.6 ACKNOWLEDGE (ACK)
Each receiving device, when addressed, is obliged to
generate an ACK bit after the reception of each byte.
The master device must generate an extra clock pulse
for ACK to be recognized.
The acknowledging device pulls down the SDA line for
tSU-DATA before the low-to-high transition of SCL from
the master. SDA also needs to remain pulled down for
tH-DATA after a high-to-low transition of SCL.
During read, the master must signal an End-of-Data
(EOD) to the slave by not generating an ACK bit (NAK)
once the last bit has been clocked out of the slave. In
this case, the slave will leave the data line released to
enable the master to generate the Stop condition.
© 2006 Microchip Technology Inc.
DS21935C-page 9

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