80C196NT View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

80C196NT

CHMOS MICROCONTROLLER WITH 1 MBYTE LINEAR ADDRESS SPACE

Intel 

8XC196NT

SLAVE PROGRAMMING MODE TIMING IN DATA PROGRAM MODE WITH REPEATED PROG PULSE

AND AUTO INCREMENT

272267 – 23

This data sheet (272267-004) applies to devices

marked with a ‘‘D’’ at the end of the top side tracking

number

8XC196NT Design Considerations

1 When operating in bus timing modes 1 or 2 the

upper and lower address data lines must be

latched Even in 8-bit bus mode the upper ad-

dress lines must be latched In modes 0 and 3

the upper address lines DO NOT NEED to be

latched in 8-bit bus width mode But in 16-bit

buswidth mode the upper address lines need to

be latched

8XC196NT ERRATA see Faxback

2344

1 ILLEGAL Opcode interrupt vector

2 Aborted Interrupt vectors to lowest priority

3 PTS Request during Interrupt latency

DATA SHEET REVISION HISTORY

This datasheet applies to devices marked with a ‘‘D’’

at the end of the topside tracking number The top-

side tracking number consists of nine characters

and is the second line on the top side of the device

Datasheets are changed as new device information

becomes available Verify with your local Intel sales

office that you have the latest version before finaliz-

ing a design or ordering devices

The following are differences between the 272267-

003 and 272267-004 datasheets

1 Changed all references of ‘‘EPROM’’ to

‘‘OTPROM’’

2 Added all the Slave Port pins to the package

diagram and pin descriptions

3 Added INTOUT pin to pin descriptions

4 Changed ILI1 (input leakage current for Port 0)

from g1 mA to g3 mA

5 Removed TLLYV from AC characterisics and

waveform diagrams

6 TRLCL in Mode 0 and 3 changed from a4 ns

min to b5 ns min

7 TWHQX in Mode 0 and 3 changed from TOSC

b 30 min to TOSC b 35 min

8 Clarified the Ready waveform timings for Mode

0 and 3 by adding ‘‘a2 TOSC ’’

9 TLHLL in Mode 1 changed from TOSC b 10 min

to TOSC b 20 min

10 TAVLL in Mode 1 changed from 0 5 TOSC b 15

min to 0 5 TOSC b 20 min

11 TLLAX in Mode 1 changed from 0 5 TOSC b 20

min to 0 5 TOSC b 25 min

12 TLHLL in Mode 2 changed from TOSC b 10 min

to TOSC b 20 min

13 TXLXL and TXLXH for the Serial Port timings

were changed to reflect the minimum baudrate

for receive and transmit modes

14 Added the 8XC196NT ERRATA section

31

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