Philips Semiconductors
Programmable deflection controller
Preliminary specification
TDA9151B
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
VCC
supply voltage
7.2
ICC
supply current
fclk = 6.75 MHz
−
Ptot
total power dissipation
−
Tamb
operating ambient temperature
−25
Inputs
V14
line-locked clock (LLC) logic level
−
V13
horizontal sync (HA) logic level
−
V12
vertical sync (VA) logic level
−
V5
line-locked clock select (LLCS) note 1
−
logic level
V18
serial clock (SCL) logic level
−
V17
serial data input (SDA) logic level
−
V1
horizontal flyback (HFB) phase FBL = logic 0
−
slicing level
FBL = logic 1
−
V1
horizontal flyback (HFB) blanking
−
slicing level
V3
over voltage protection (PROT)
−
level
V9
EHT flash detection level
−
Outputs
V20
horizontal output (HOUT) voltage I20 = 10 mA
−
(open drain)
I11−I10(M)
V10,11
I6(M)
vertical differential (VOUTA, B)
output current (peak value)
vertical amplitude = 100%; 440
I8 = −120 µA; note 2
vertical output voltage
0
EW (EWOUT) total output current I8 = −120 µA
−
(peak value)
V6
EW (EWOUT) output voltage
1.0
SANDCASTLE OUTPUT LEVELS (DSC)
V2
base voltage level
−
V2
horizontal and vertical blanking
−
voltage level
V2
video clamping voltage level
−
HORIZONTAL OFF-CENTRE SHIFT (OFCS)
V19
output voltage
I19 = 2 mA
0
Notes
1. Hard wired to ground or VCC is highly recommended.
2. DAC values: vertical amplitude = 31; EHT = 0; SHIFT = 3; SCOR = 0.
TYP.
8.0
27
220
−
MAX.
8.8
−
−
+70
TTL
−
TTL
−
TTL
−
CMOS 5 V −
CMOS 5 V −
CMOS 5 V −
3.9
−
1.3
−
100
−
3.9
−
1.5
−
−
0.5
475
510
−
3.9
−
930
−
5.5
0.5
−
2.5
−
4.5
−
−
VCC
UNIT
V
mA
mW
°C
V
V
mV
V
V
V
µA
V
µA
V
V
V
V
V
July 1994
3