MC44002P View Datasheet(PDF) - Motorola => Freescale
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MC44002P Datasheet PDF : 40 Pages
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MC44002 MC44007
(10 µA). Therefore, the image color will always be adjusted to
match the dark level color, i.e. grey scale tracking is ensured.
The Load/Backload sequencer is used to control which
latch is being addressed at any given time by means of the
timing signals input to it. The backload command sends the
data from the appropriate latch to the Up/Down Counter,
ready to be modified if necessary.
The Brightness control is affected by simply changing the
dc pedestal of all three drives by the same amount, and does
not form part of the feedback loop. The Contrast is adjusted
to a set of values dependent on the level of the bright pulse
applied during the set–up period. This level is set by a control
word from the MCU. Once the loops have stabilized under
normal working conditions, they may be deactivated by
means of a control bit from the MCU. When, however, any
change is made to either contrast or RGB intensity, the loops
must be reactivated. For normal operation, it is not necessary
to deactivate the bright loops.
Increasing the RGB intensity values will cause the
Black–to–White cathode voltage amplitude to increase for a
given Contrast setting. The White balance can therefore be
set by adjusting the relative values of R, G and B intensity. An
extra loop has been included via Latch 4 and DAC 4, which
operates during the field flyback time to compensate for
offsets within the loop. This has the effect of counteracting
any input offset from the Buffer/Amp and will also
compensate for cathode leakage should this be needed.
A second output of the reference currents from the RGB
DACs are used to compare with preset limits, to ensure that
the loops are working within their range of control. Should the
limits be exceeded in either direction, flags are returned to
the MCU to request that the G2 control be adjusted up or
down as appropriate. Once set–up, the servo loops maintain
the same conditions throughout the life of the TV.
Horizontal Timebase
The horizontal timebase consists of a PLL which locks up
to the incoming horizontal sync, and a phase detector and
shifter whose purpose is to maintain the H-Drive in phase
with the line flyback pulse.
Because of on-chip component tolerances, the
free-running oscillator frequency cannot be set more
accurately than ± 40%; this range would be too much for the
line output stage to cope with. For this reason the
free-running frequency is calibrated periodically by other
means. During startup and whenever there is a channel
change, the phase detector is disconnected from the VCO for
2 lines during the blanking interval. A block diagram of the
line timebase is given in Figure 14. The calibration loop
consists of a frequency comparator driving an Up/Down
Counter. The count is D/A converted to give a dc bias which
is used to correct a 1.0 MHz VCO. The 1.0 MHz is divided by
64 to give line frequency and this is returned to the frequency
comparator. This compares Fh from the VCO with a
reference derived from dividing down the subcarrier
frequency. Any difference in frequency will result in an output
from the comparator, causing the counter to count up or
down; and thus closing the loop. Since the horizontal
oscillator is quite stable, this calibration does not need to be
carried out very often. After switch–on, the calibration loop
need only be enabled when the timebase goes out of lock.
A Coincidence Detector looks at the PLL Fh and compares
it with the incoming H-sync. If they are not in lock, a flag is
returned to the MCU. To allow for use with VCRs, the gain of
the phase detector may be switched by means of commands
from the MCU (bits HGAIN1 and HGAIN2). The gain of the
phase detector is switched to the maximum value at the end
of the vertical sync pulse and then reduced to the selected
value after about 11 lines. This allows the horizontal timebase
to rapidly compensate any horizontal phase jump (e.g. with a
VCR) during the vertical blanking period, thus avoiding
bending at the top of the picture.
Twice line frequency is output from the PLL which may be
divided by either 1 or 2 depending on the command of the
MCU. The x2 Fh will be used with Feature Boxes. The phase
of the Fh and flyback pulses are compared in a phase
detector, whose output drives a phase shifter. A 6-bit control
word and D/A converter are used to apply an offset to the
phase detector giving a horizontal phase shift control.
The presence of the horizontal flyback pulse is detected; if
it is missing a warning flag is sent back to the MCU which can
take appropriate action.
Vertical Timebase
The vertical timebase consists of two sections; a digital
section which includes a vertical sync separator and
standard recognition; and an analog section which generates
a vertical ramp which may be modified under MCU control to
allow for geometrical adjustments. A parabola is also
generated and may be used for pin-cushion (E-W) correction
and width control (see Figure 15).
In the digital section, the MC44002/7 uses a video sync
separator which works using feedback, such that the
threshold level of a comparator (slice level) is always
maintained at the center of the sync pulse. Sync from any of
the auxiliary inputs may also be used. The composite sync is
fed to a vertical sync separator, where vertical sync is
derived. This consists of a comparator, up/down counter and
decoder. The counter counts up when sync is high, and down
when sync is low. The output of the decoder is compared with
a threshold level, the threshold only being reached with a
high count during the broad pulses in the field interval.
When “Auto Countdown” is selected, the vertical timebase
in fact starts off in the “Injection Lock” mode. This means that
the timebase locks immediately to the first signal received, in
exactly the same way as an old type injection locked
timebase. A coincidence detector looks for counts of the right
number (525 e.g.), and causes a 4 bit counter to count up.
When there are 8 consecutive coincidences, the vertical
countdown is engaged, and the MSB of the counter is
brought out to set the flag. Similarly, non–coincidence, which
will occur if synchronizing pulses are missing or in the wrong
place, or if there is noise on the signals, causes the counter to
count down. When the count goes back to zero, after 8
noncoincidences, the timebase automatically reverts to
“Injection Lock” mode.
If it is known that lock will be lost (e.g., channel change), it
is possible to jump straight into Injection Lock mode and not
have to wait for the 8 consecutive non-coincidences. In this
way the new channel will be captured rapidly. Once locked on
to the new channel, “auto countdown” is then reselected by
the MCU.
Under some conditions such as some VCRs in Search
mode, it is possible to get signals having an incorrect number
of lines, meaning that the countdown flag will go off because
of successive non-coincidences. In these circumstances, if
“auto countdown” is selected, the timebase will automatically
lock to the signal in the Injection Lock mode. The fact that the
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