SAA7345ZP View Datasheet(PDF) - Philips Electronics

Part Name

Description

Manufacturer

SAA7345ZP

CMOS digital decoding IC with RAM for Compact Disc

Philips Electronics 

Philips Semiconductors

CMOS digital decoding IC with RAM for

Compact Disc

Product specification

SAA7345

BEHAVIOUR OF THE SUBQREADY-I SIGNAL

When the CRC of the Q-channel word is good, and no

subcode is being read, the SUBQREADY-I signal will react

as shown in Fig.9.

When the CRC is good and subcode is being read, the

timing in Fig.10 applies.

If t1 (SUBQREADY-I LOW to end of subcode read) is

below 2.6 ms, then t2 = 13.1 ms (i.e. the microcontroller

can read all subcode frames if it completes the read

operation within 2.6 ms after subcode ready).

If this criterion is not met, it is only possible to guarantee

that t3 will be below 26.2 ms (approximately).

If subcode frames with failed CRCs are present, the t2 and

t3 times will be increased by 13.1 ms for each defective

subcode frame.

SHARING THE MICROCONTROLLER INTERFACE

When the RAB pin is held LOW by the microcontroller, it is

permitted to put any signal on the DA and CL lines

(SAA7345 will set output DA to high-impedance). Under

this circumstance these lines may be used for another

purpose (e.g. TDA1301 microcontroller interface Data and

Clock line, see Fig.11).

RAB

(microcontroller)

CL

(microcontroller)

high

DA (SAA7345)

impedance

CRC OK

10.8 ms

15.4 ms

2.3

ms

READ start allowed

CRC OK

MGA373 - 1

Fig.9 SUBQREADY-I timing when no subcode is read.

RAB

(microcontroller)

CL

(microcontroller)

DA (SAA7345)

t2

t1

t3

Q1 Q2 Q3

Qn

MGA374 - 1

Fig.10 SUBQREADY-I timing when subcode is being read.

1998 Feb 16

10

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