CDP1878C View Datasheet(PDF) - Intersil
Part Name
Description
Manufacturer
CDP1878C Datasheet PDF : 13 Pages
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CDP1878C
MEMORY
CLOCK XTAL
ADDRESS
LINES
CLEAR
TPA
MRD
TPB
N0
N1
N2
INT
CDP1802
VDD
TACL, TBCL
RESET
TPA
RD
TPB/WR
A0
A1
A2
CS
IO/MEM
INT
COUNTER - TIMER
DB0 - DB7
TAG
GATE
INPUTS
TBG
TAO
TAO
TIMER
OUTPUTS
TBO
TBO
DATA BUS
FIGURE 11. TYPICAL CDP1802 INPUT/OUTPUT-MAPPED SYSTEM
TPA
RD
N LINES
TPB/WR
DATA LATCHED
DATA FROM MEMORY
TO COUNTER-TIMER
VALID DATA
FIGURE 12. CDP1800-SERIES INPUT/OUTPUT-MAPPING TIMING WAVEFORMS WITH OUTPUT INSTRUCTION
TPA
OUTPUT DRIVERS ENABLED
RD
TPB/WR
OUTPUT DRIVERS
DISABLED
N LINES
DATA FROM
COUNTER-TIMER
TO MEMORY
VALID DATA
FIGURE 13. CDP1800-SERIES INPUT/OUTPUT-MAPPING TIMING WAVEFORMS WITH INPUT INSTRUCTION
4-101
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