AD7731(1997) View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD7731 Datasheet PDF : 44 Pages
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AD7731
Output Noise (CHP = 1, SKIP = 0)
Table III shows the output rms noise for some typical output update rates and –3 dB frequencies for the AD7731 when used in
chopping mode (CHP of Filter Register = 1) and with the second filter included in the loop. The numbers are generated with a mas-
ter clock frequency of 4.9152 MHz. These numbers are typical and generated at a differential analog input voltage of 0 V. The out-
put update rate is selected via the SF0 to SF11 bits of the Filter Register. Table IV, meanwhile, shows the output peak-to-peak
resolution in bits (rounded to the nearest 0.5 LSB) for the same output update rates. It is important to note that the numbers in
Table IV represent the resolution for which there will be no code flicker within a six-sigma limit. They are not calculated based on
rms noise but on peak-to-peak noise.
The numbers are generated for the bipolar input ranges. When the part is operated in unipolar mode, the output noise will be the
same as the equivalent bipolar input range. As a result, the numbers in Table III will remain the same for unipolar ranges. To calcu-
late the number for Table IV for unipolar input ranges simply subtract one from the peak-to-peak resolution number in bits.
Table III. Output Noise vs. Input Range and Update Rate (CHP = 1, SKIP = 0)
Typical Output RMS Noise in nV
Output –3 dB
SF
Data Rate Frequency Word
50 Hz
100 Hz
150 Hz
200 Hz
400 Hz
800 Hz
1.97 Hz
3.95 Hz
5.92 Hz
7.9 Hz
15.8 Hz
31.6 Hz
2048
1024
683
512
256
128
Settling Time
Input Range
Normal Fast Step ؎1.28 V ؎640 mV ؎320 mV ؎160 mV ؎80 mV ؎40 mV ؎20 mV
440 ms
220 ms
147 ms
110 ms
55 ms
27.5 ms
40 ms
20 ms
13.3 ms
10 ms
5 ms
2.5 ms
700
980
1230
1260
2000
3800
425
550
700
840
1230
2100
265
170
330
230
445
270
500
340
690
430
1400 760
120
85
55
190
115 90
210
140 100
245
170 105
335
215 160
590
345 220
Table IV. Peak-to-Peak Resolution vs. Input Range and Update Rate (CHP = 1, SKIP = 0)
Peak-to-Peak Resolution in Bits
Output –3 dB
SF
Data Rate Frequency Word
50 Hz
100 Hz
150 Hz
200 Hz
400 Hz
800 Hz
1.97 Hz
3.95 Hz
5.92 Hz
7.9 Hz
15.8 Hz
31.6 Hz
2048
1024
683
512
256
128
Settling Time
Input Range
Normal Fast Step ؎1.28 V ؎640 mV ؎320 mV ؎160 mV ؎80 mV ؎40 mV ؎20 mV
440 ms 40 ms
19
19
230 ms 30 ms
19
18.5
147 ms 13.3 ms 18.5 18
110 ms 10 ms
18.5 18
55 ms 5 ms
17.5 17.5
27.5 ms 2.5 ms 17
16.5
18.5 18.5
18.5 18
18
17.5
17.5 17.5
17
17
16
16
18
17.5 17
17
17
16
17
16.5 16
17
16.5 16
16.5 16
15.5
15.5 15
15
ON-CHIP REGISTERS
The AD7731 contains 12 on-chip registers that can be accessed
via the serial port of the part. These registers are summarized in
Figure 4 and in Table V, and described in detail in the following
sections.
COMMUNICATIONS REGISTER
DIN
DIN
RS2 RS1 RS0
DOUT
DOUT
STATUS REGISTER
DOUT
DIN
DOUT
DATA REGISTER
MODE REGISTER
DIN
DOUT
FILTER REGISTER
DIN
DOUT
OFFSET REGISTER (x3)
DIN
DOUT
GAIN REGISTER (x3)
DIN
DOUT
TEST REGISTER
REGISTER
SELECT
DECODER
REV. 0
–11–
Figure 4. Register Overview
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