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TSC87251G2D-16CB View Datasheet(PDF) - Atmel Corporation

Part Name
Description
Manufacturer
TSC87251G2D-16CB Datasheet PDF : 76 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
4135D–8051–08/05
AT/TSC8x251G2D
Table 2. Product Name Signal Description (Continued)
Signal
Name Type Description
Alternate
Function
Timer 1:0 External Clock Inputs
T1:0
I/O When timer 1:0 operates as a counter, a falling edge on the T1:0 pin
increments the count.
Timer 2 Clock Input/Output
T2
I/O For the timer 2 capture mode, T2 is the external clock input. For the Timer 2
P1.0
clock-out mode, T2 is the clock output.
T2EX
Timer 2 External Input
In timer 2 capture mode, a falling edge initiates a capture of the timer 2
I registers. In auto-reload mode, a falling edge causes the timer 2 register to
be reloaded. In the up-down counter mode, this signal determines the
count direction: 1 = up, 0 = down.
P1.1
TXD
Transmit Serial Data
O TXD outputs the shift clock in serial I/O mode 0 and transmits data in serial
I/O modes 1, 2 and 3.
P3.1
VDD
PWR
Digital Supply Voltage
Connect this pin to +5V or +3V supply voltage.
Programming Supply Voltage
VPP
I The programming supply voltage is applied to this input for programming
the on-chip EPROM/OTPROM.
VSS
GND
Circuit Ground
Connect this pin to ground.
Secondary Ground 1
This ground is provided to reduce ground bounce and improve power
supply bypassing. Connection of this pin to ground is recommended.
VSS1 GND However, when using the TSC80251G2D as a pin-for-pin replacement for a
8xC51 product, VSS1 can be unconnected without loss of compatibility.
Not available on DIP package.
Secondary Ground 2
This ground is provided to reduce ground bounce and improve power
supply bypassing. Connection of this pin to ground is recommended.
VSS2 GND However, when using the TSC80251G2D as a pin-for-pin replacement for a
8xC51 product, VSS2 can be unconnected without loss of compatibility.
Not available on DIP package.
WAIT#
Real-time Synchronous Wait States Input
The real-time WAIT# input is enabled by setting RTWE bit in WCON
I (S:A7h). During bus cycles, the external memory system can signal
‘system ready’ to the microcontroller in real time by controlling the WAIT#
input signal.
P1.6
WCLK
Wait Clock Output
O
The real-time WCLK output is enabled by setting RTWCE bit in WCON
(S:A7h). When enabled, the WCLK output produces a square wave signal
with a period of one half the oscillator frequency.
P1.7
WR#
O
Write
Write signal output to external memory.
P3.6
Input to the on-chip inverting oscillator amplifier
XTAL1
I
To use the internal oscillator, a crystal/resonator circuit is connected to this
pin. If an external oscillator is used, its output is connected to this pin.
XTAL1 is the clock source for internal timing.
9

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