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TDA16846G View Datasheet(PDF) - Infineon Technologies

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TDA16846G Datasheet PDF : 28 Pages
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TDA 16846
TDA 16846-2
Secondly, a High Power Shutdown Comparator (FC2) is implemented: When the voltage
V6 at Pin 6 exceeds 1.2 V the Error Flip Flop (ERR) is set. The output voltage of the
power measurement circuit (Pin 8) is smoothed by R8/C6 and applied to the “high power
shutdown” input at Pin 6. The relation between this voltage V6 and the output power of
the converter P is approximately:
V6 (P × LSecondary × 5 V)/(VOUT2 × C8 × R9)
LSecondary: The transformers secondary inductance
VOUT: The converters output voltage
So the time constant of R9/C8 for a certain high power shutdown level PSD is:
R9 × C8 (PSD × LSecondary × 4.2)/VOUT2
The converters high power shutdown level can be adjusted lower (by R9, C8) than the
current limit level (see “current limiting”). Thus because of the delay R8/C6, the converter
can deliver maximum output power (current limit level) for a certain time (e. g. for power
pulses like motor start current) and a power below the high power shutdown level for an
unlimited time. This is of advantage because the thermal dimensioning of the power
devices needs to be done for the lower power level only. Once the voltage V6 exceeds
1.2 V no more charging or discharging happens at Pin 8. The voltage V6 remains high
due to the bias current out of FC2 and the converter remains switched-off. Reset can be
done either by plugging-off the supply from the mains or by a high value resistor R6
(Figure 14). R6 causes a reset every few seconds. When Pin 9 is not connected or gets
too little current (I9 < I9FC2), the temporary high power circuit is disabled.
Data Sheet
18
2003-07-31

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