FAN5250 View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
Manufacturer
FAN5250 Datasheet PDF : 17 Pages
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FAN5250
frequency gain. The only task that the system designer has to
complete is to specify the output filter capacitors to position
the load main pole somewhere within one decade lower than
the amplifier zero frequency. With this type of compensation
plenty of phase margin is easily achieved due to zero-pole
pair phase ‘boost’.
Conditional stability may occur only when the main load
pole is positioned too much to the left side on the frequency
axis due to excessive output filter capacitance. In this case,
the ESR zero placed within the 10kHz...50kHz range gives
some additional phase ‘boost’. Fortunately, there is an oppo-
site trend in mobile applications to keep the output capacitor
as small as possible.
Protection
The converter output is monitored and protected against
extreme overload, short circuit, over-voltage and
under-voltage conditions.
A sustained overload on the output sets the PGOOD pin low
and latches-off the whole chip. Operation can be restored by
cycling the VCC voltage or enabling (EN) pin.
Over-Current Sensing
When the circuit's current limit signal (“ILIM det” as shown
in Figure 7) goes high, a pulse-skipping circuit is activated.
HDRV will be inhibited as long as the sensed current is
higher than the ILIM value. This limits the current supplied
by the DC input. This condition continues for 8 clock cycles
after the over-current comparator was tripped for the first
time. If after these first 8 clock cycles the current exceeds the
over-current threshold again at any time within the subse-
quent 8 clock cycles, the overcurrent protection circuit is
latched and the chip is disabled. If "ILIM det" goes away
during the first 8 clock cycles, normal operation is restored
and the over-current circuit resets itself 16 clock cycles after
the over-current threshold was exceeded for the first time.
1
IL
2
PGOOD
8 CLK
VOUT
Shutdown
3
CH1 5.0V
CH3 2.0AΩ
CH2 100mV
M 10.0µs
If the load step is strong enough to pull the VCORE + lower
than the under-voltage threshold, the chip shuts down
immediately.
Over-Voltage Protection
Should the output voltage exceed 1.9V due to an upper
MOSFET failure, or for other reasons, the overvoltage
protection comparator will force the LDRV high. This action
actively pulls down the output voltage and, in the event of
the upper MOSFET failure, will eventually blow the battery
fuse. As soon as the output voltage drops below the
threshold, the OVP comparator is disengaged.
This OVP scheme provides a ‘soft’ crowbar function which
helps to tackle severe load transients and does not invert the
output voltage when activated — a common problem for
OVP schemes with a latch.
Over-Temperature Protection
The chip incorporates an over temperature protection circuit
that shuts the chip down when a die temperature of 150˚C
is reached. Normal operation is restored at die temperature
below 125°C with internal Power On Reset asserted,
resulting in a full soft-start cycle.
Design and Component Selection
Guidelines
As an initial step, define operating voltage range and mini-
mum and maximum load currents for the controller.
Output Inductor Selection
The minimum practical output inductor value is the one that
keeps inductor current just on the boundary of continuous
conduction at some minimum load. The industry standard
practice is to choose the minimum current somewhere from
15% to 35% of the nominal current. At light load, the con-
troller can automatically switch to hysteretic mode of opera-
tion to sustain high efficiency. The following equations help
to choose the proper value of the output filter inductor.
∆I = 2 × IMIN = -∆--E--V---S-O---R-U---T--
where ∆I is the inductor ripple current and ∆VOUT is the
maximum ripple allowed.
L = -V---F-I-N--S---W–-----V-×---O--∆--U--I--T- × -V--V--O---I-UN---T--
for this example we'll use:
VIN = 20V, VOUT = 1V
∆I = 30% × 5A = 1.25A
FSW = 300KHz
Therefore,
L ≈ 1.8µH
REV. 1.1.6 3/12/03
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