CS8900-IQ3 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CS8900-IQ3

Crystal LAN™ ISA Ethernet Controller

Cirrus Logic 

CS8900A

Crystal LAN™ ISA Ethernet Controller

4.10.2 TTxCMD Port ....................................................................................................75

4.10.3 TTxLength Port ..................................................................................................75

4.10.4 TInterrupt Status Queue Port ............................................................................75

4.10.5 TPacketPage Pointer Port .................................................................................75

4.10.6 TPacketPage Data Ports 0 and 1 ......................................................................76

4.10.7 TI/O Mode Operation .........................................................................................76

4.10.8 TBasic I/O Mode Transmit .................................................................................76

4.10.9 TBasic I/O Mode Receive ..................................................................................76

4.10.10 TAccessing Internal Registers .........................................................................77

4.10.11 TPolling the CS8900A in I/O Mode .................................................................77

5.0 OPERATION ..........................................................................................................................78

5.1 Managing Interrupts and Servicing the Interrupt Status Queue .......................................78

5.2 Basic Receive Operation ..................................................................................................78

5.2.0.1 Overview .............................................................................................78

5.2.1 TTerminology: Packet, Frame, and Transfer .......................................................80

5.2.1.1 Packet .................................................................................................80

5.2.1.2 Frame ..................................................................................................80

5.2.1.3 Transfer ...............................................................................................80

5.2.2 TReceive Configuration .......................................................................................80

5.2.2.1 Configuring the Physical Interface .......................................................80

5.2.2.2 Choosing which Frame Types to Accept .............................................80

5.2.2.3 Selecting which Events Cause Interrupts ............................................81

5.2.2.4 Choosing How to Transfer Frames ......................................................81

5.2.3 TReceive Frame Pre-Processing ........................................................................81

5.2.3.1 Destination Address Filtering ..............................................................82

5.2.3.2 Early Interrupt Generation ...................................................................83

5.2.3.3 Acceptance Filtering ............................................................................83

5.2.3.4 Normal Interrupt Generation ................................................................83

5.2.4 THeld vs. DMAed Receive Frames .....................................................................83

5.2.5 TBuffering Held Receive Frames ........................................................................83

5.2.6 TTransferring Held Receive Frames ...................................................................85

5.2.7 TReceive Frame Visibility ....................................................................................85

5.2.8 TExample of Memory Mode Receive Operation .................................................85

5.2.9 TReceive Frame Byte Counter ............................................................................86

5.3 Receive Frame Address Filtering .....................................................................................86

5.3.0.1 Individual Address Frames ..................................................................87

5.3.0.2 Multicast Frames .................................................................................87

5.3.0.3 Broadcast Frames ...............................................................................87

5.3.1 TConfiguring the Destination Address Filter ........................................................87

5.3.2 THash Filter .........................................................................................................88

5.3.2.1 Hash Filter Operation ..........................................................................88

5.3.3 TBroadcast Frame Hashing Exception ................................................................88

5.4 Receive DMA ...................................................................................................................89

5.4.1 TOverview ...........................................................................................................89

5.4.2 TConfiguring the CS8900A for DMA Operation ..................................................89

5.4.3 TDMA Receive Buffer Size ..................................................................................89

5.4.4 TReceive-DMA-Only Operation ...........................................................................90

5.4.5 TCommitting Buffer Space to a DMAed Frame ...................................................91

5.4.6 TDMA Buffer Organization ..................................................................................91

5.4.7 TRxDMAFrame Bit ..............................................................................................91

5.4.8 TReceive DMA Example Without Wrap-Around ..................................................91

5.4.9 TReceive DMA Operation for RxDMA-Only Mode ..............................................91

5.5 Auto-Switch DMA .............................................................................................................92

CIRRUS LOGIC PRODUCT DATASHEET

DS271PP4

5

Share Link: