CA3274 View Datasheet(PDF) - Intersil
Part Name
Description
Manufacturer
CA3274 Datasheet PDF : 5 Pages
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tRISE
tON
DELAY
CA3274
tFALL
tOFF
DELAY
CURRENT
LIMITING
SYSTEM
NOISE
3.35mV
SENSE
LEVEL
ON TIME
tSENSE
(NOISE HOLD-OFF
DELAY)
tD (SEE NOTE)
NOTE: For VCC = 7V to 10V; tD (MAX) = 600µS, if Control In = High,
Sense In = High; Pin 1, Flag Out can go low only if tSENSE ≥ tD
tFLAG
DELAY
FIGURE 2. CA3274 TIMING DIAGRAM
CONTROL IN - PIN 7
DRIVE OUT- PIN 5
OUTPUT
LOAD CURRENT
SENSE IN - PIN 2
FLAG OUT- PIN 1
7
IN VCONTROL
+VCC2
(ADJ. FOR 3mA
IN FLAG-OUT 10K
VSAT TEST
FLAG 1
OUT
Q1
4
SIGNAL
GROUND
POWER SUPPLY
+VCC
ICC
8
CONTROL
LOGIC
Q2
OUTPUT LOAD
POWER SUPPLY
+VCC1
IN
6 IN
51Ω
(ADJ. FOR 200mA
IN VSAT TEST)
DRIVER
5
OUT S1
3
1
(PSSROUT)
2.1V
LATCH
-
2
1
SENSE S1
2.1V
120
+
IN
3
120Ω
335mV
3 POWER
GROUND
FIGURE 3. CA3274 TEST CIRCUIT
VSENSE
10-43
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