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UPC8100GR View Datasheet(PDF) - NEC => Renesas Technology

Part Name
Description
Manufacturer
UPC8100GR Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
µPC8100GR
PIN EXPLANATION
PIN
NO.
ASSIGNMENT
APPLIED
VOLTAGE (V)
PIN VOLTAGE
(V)
FUNCTION AND APPLICATION
1
GND
0.0
Ground for downconverter.
Must be connected to the system ground
with minimum inductance. Ground pat-
tern on the board should be formed as
wide as possible.
(Track length should be kept as short as
possible.)
EQUIVALENT CIRCUIT
2
RF bypass
3
RF input
4 Peaking out
1.1
Bypass of RF input for downconverter.
0.9
This pin is RF input for downconverter
designed as double balanced mixer.
This high-impedance input should be REG.
matched with external chip inductor. (eg
4.7 nH).
3
4
0.12
Open emitter pin of low noise amplifier.
Grounded with capacitor (eg 3 pF) and
register (eg 22 ) serially.
VCC
2
REG.
5 Power-save pin 0 to 4.5
for
downconverter
This pin can control downconverter’s
ON/OFF operation with bias as follows;
Bias: V Operation
1.8
VPS
0 to 1.0
ON
OFF
5
6 Power-save pin 0 to 4.5
This pin can control upconverter’s ON/
or
6
for
OFF operation with bias as follows;
upconverter
Bias: V Operation
1.8
VPS
0 to 1.0
ON
OFF
7
VCC for
2.7 to 4.5
Supply voltage for upconverter.
upconverter
Must be connected bypass capacitor
(e.g 1 000 pF) to minimize ground im-
8
REG.
pedance.
8
RF output
same as
F output from upconverter.
VCC through
Connect the VCC through inductor (eg 15
intactor
nH).
9
GND
0.0
Ground for RF amplifier of upconverter.
Data Sheet P10817EJ3V0DS00
3

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