UPD16662 View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
Manufacturer
UPD16662 Datasheet PDF : 36 Pages
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µPD16662
Pin name
Classification Voltage Pin Name Note
I/O
Function
CPU I/F
Control signals
3.3 V D0 to D15
A0 to A16
/CS
/OE
/WE
/UBE
RDY
3.3 V PL0
PL1
DIR
MS
BMODE
/REFRH
TEST
/RESET
/DOFF
OSC1
OSC2
5.0 V STB
Liquid-crystal drive
/FRM
PULSE
L1
L2
/DOUT
Y1 to Y240
I/O Data bus 16
I Address bus 17
I Chip select
I Read signal
I Write signal
I High byte enable
O Ready signal to CPU (Ready state at H)
I Specifies the LSI allocation locations (No. 0 to 3).
I Specifies the LSI allocation locations (No. 0 to 3).
I Specifies the liquid-crystal panel allocation direction
(longitudinal; lateral)
I Master/slave switching (Master mode at H)
I Data bus bit select pin ("H" = 8bit, "L" = 16bit)
I/O Self diagnostic reset pin (Wired OR connection)
I Test pin (Test mode at H, using the pull-down buffer)
I Reset
I Display OFF signal input
- Oscillator pin
- Oscillator pin
I/O Column driving signal strobe
(MS signal "H" = output, MS signal "L" = input )
I/O Frame signal(MS pin "H" = output , MS pin "L" = input )
I/O 25-gray level pulse modulation clock
I/O Row driver drive level selection signal (1st line)
I/O Row driver drive level selection signal (2nd line)
O Display OFF signal output
O Liquid-crystal drive output
Powers
GND
- Ground (two 5-V pins; three 3-V pins)
VCC1
- 5-V power level
VCC2
- 3.3-V power level
V0
- Liquid-crystal drive analog power
V1
- Liquid-crystal drive analog power
V2
- Liquid-crystal drive analog power
Remark /xxx indicates active low signal.
Note 3.3-V power pins : D0 - D15, A0 - A16, /CS, /OE, /WE, /UBE, RDY, BMODE, PL0, PL1, DIR, OSC1,
OSC2, /RESET, /DOFF, TEST, MS
5-V power pins : STB, /FRM, L1, L2, /DOUT, PULSE
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