UPD16663 View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

Manufacturer

UPD16663

240-OUTPUT LCD COLUMN (SEGMENT) DRIVER WITH BUILT-IN RAM

NEC => Renesas Technology 

µPD16663

1. PIN FUNCTIONS

Classification

CPU Interface

3.3 V

Control signals

3.3 V

5.0 V

LCD drive

Power supply

Pin nameNote

D0 to D15

A0 to A16

/CS

/OE

/WE

/UBE

RDY

PL0

PL1

DIR

MS

BMODE

/REFRH

TEST

/RESET

/DOFF

OSC1

OSC2

STB

/FRM

PULSE

L1

L2

/DOUT

Y1 to Y240

GND

VCC1

VCC2

V0

V1

V2

I/O

Function

I/O

Data bus : 16 bits

I

Address bus : 17 bits

I

Chip select

I

Read signal

I

Write signal

I

Upper byte enable

O

Ready signal issued to CPU ("H" sets ready status)

I

Specifies the LSI placement position (No. 0 to 3)

I

Specifies the LSI placement position (No. 0 to 3)

I

Specifies the direction of the LCD panel placement

I

Selects between master/slave ("H" sets master mode)

I

Selects the data bus bit ("H" sets 8 bits, "L" sets 16 bits)

I/O

Self-diagnostics reset pin (Wired-OR connection)

I

Test pin ("H" sets test mode, pull-down resistor is built-in)

I

Reset signal

I

Display OFF input signal

-

For external resistor for oscillator

-

For external resistor for oscillator

I/O

Column driving signal (MS pin "H" sets output, MS pin "L" sets input)

I/O

Frame signal (MS pin "H" sets output, MS pin "L" sets input)

I/O

25-gray-scale pulse modulation clock

I/O

Row driver driving level select signal (line 1)

I/O

Row driver driving level select signal (line 2)

O

Display OFF output signal

O

LCD drive output

-

Ground (× 2 for 5 V, × 3 for 3.3 V)

-

5-V power supply

-

3.3-V power supply

-

LCD drive analog power supply

-

LCD drive analog power supply

-

LCD drive analog power supply

Note

3.3-V pins : D0 to D15, A0 to A16, /CS, /OE, /WE, /UBE, RDY, BMODE, PL0, PL1, DIR, OSC1, OSC2, /RESET,

/DOFF, TEST, MS

5-V pins :STB, /FRM, L1, L2, /DOUT, PULSE

Remark N.C. = Non-connection

Data Sheet S13392EJ1V0DS00

3

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