UPD17235 View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

Manufacturer

UPD17235

4-BIT SINGLE-CHIP MICROCONTROLLER FOR SMALL GENERAL-PURPOSE INFRARED REMOTE CONTROL TRANSMITTER

NEC => Renesas Technology 

µPD17230, 17231, 17232, 17233, 17234, 17235, 17236

2.3.2 Function of stack

The address stack register stores a return address when the subroutine call instruction or table reference

instruction (first instruction cycle) is executed or when an interrupt is accepted. It also stores the contents of the

address registers (ARs) when a stack manipulation instruction (PUSH AR) is executed.

If subroutines or interrupts are nested to more than 5 levels, the RESET pin is internally pulled down and

a reset is effected.

The interrupt stack register (INTSK) saves the contents of the bank register (BANK) and program status word

(PSWORD) when an interrupt is accepted. The saved contents are restored when an interrupt return (RETI) instruction

is executed.

INTSK saves data each time an interrupt is accepted, but the data stored first is lost if more than 3 levels of

interrupts occur.

2.3.3 Stack Pointer (SP) and Interrupt Stack Pointer

Table 2-3 shows the operations of the stack pointer (SP).

The stack pointer can take eight values, 0H-07. Because there are only five stack registers available, however,

the RESET pin is internally pulled down and reset is effected if the value of SP is 6 or greater.

Table 2-3. Operations of Stack Pointer

Instruction

CALL addr

CALL @AR

MOVT DBF, @AR

(1st Instruction Cycle)

PUSH AR

SYSCAL entry

When interrupt is accepted

RET

RETSK

MOVT DBF, @AR

(2nd Instruction Cycle)

POP AR

RETI

Value of Stack Pointer (SP)

Counter of Interrupt Stack Register

–1

0

–1

–1

+1

0

+1

+1

18

Data Sheet U14360EJ1V0DS00

Share Link: