UPD161830 View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
Manufacturer
UPD161830 Datasheet PDF : 24 Pages
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µPD161830
(2/2)
Pin Symbol
Pin Name
Pad No. I/O
Description
AP
Output SW
270
Input MODE = L
ON/OFF
This pin turns ON/OFF the BIAS circuit and turns on the output SW and amplifier.
When AP is H, the amplifier is set and the LCD is driving.
The amplifier output and output SW are turned on at the rising edge of AP,
starting the LCD drive. Note that the output SW is turned off at the rising edge of
STB and the output becomes Hi-Z (Hi-Z: High impedance). For details, refer to 4.1
Drive Timing by MODE and AP Signal.
For the AP input timing, refer to Switching Characteristics Waveform.
MODE = H
A sauce driver output circuit is changed to an amplifier output by grand fixation.
For details, refer to 4.1 Drive Timing by MODE and AP Signal.
GAM
External γ -usage 267
selection
Input
When the γ -correction power supply is input externally, switch GAM to H. If two or
more chips are used, be sure to input the γ -correction power supply externally.
Figure 4–4 shows an input example of the γ -correction power supply.
GAM = L: External γ -correction power supply not input (open)
GAM = H: External γ -correction power supply input
MODE
Driver output
265
functional change
Input The drive mode of the sauce driver output by AP pin is set up as follows.
For details, please refer to 4.1 Drive Timing by MODE and AP Signal.
MODE = L: Normal drive mode
MODE = H: Grand output drive mode
V0 to V4
γ -corrected power 294 to 280
supplies
− These pins input the γ -corrected power supplies from outside, the relationship
below must be observed. Also, be sure to stabilize the gray-scale-level power
supply during gray-scale voltage output.
VSS2 ≤ V4 ≤ V3 ≤ V2 ≤ V1 ≤ V0 ≤ VDD2
BA
BIAS current
266
Input This pin adjusts the BIAS current and through rate of amplifier inside IC.
adjustment
function
Select either the high power mode or low power mode.
In addition, as compared with the time of the low power mode, twice about as
many bias current as this flows at the time of high power mode.
BA = L: Low power mode
BA = H: high power mode
TESTIN
TEST input pin 311
Input Set to H or leave open
TESTO1,
TESTO2
TEST output pin 309,
310
Output Leave open.
VDD1
Logic power
254 to 256, − 2.2 to 3.6 V
supply
312 to 314
VDD2
Driver power
251 to 253, − 4.5 to 5.5 V
supply
321 to 323
VSS1
Logic ground
257 to 259, − Ground
315 to 317
VSS2
Driver ground
260 to 262, − Ground
318 to 320
Dummy1 to Dummy
dummy18
241 to 247, 250, − This pin is dummy.
279, 295, 324,
326 to 332
Caution To avoid latchup failure, the sequence when turning on the power must be VDD1 → logic input →
VDD2 →gray-scale power supply (V0 to V4), and the reverse sequence when turning off the power.
Follow this sequence during shift periods as well.
Preliminary Product Information S16240EJ1V0PM
7
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