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UPD17P401CG-XXX-3B9 View Datasheet(PDF) - NEC => Renesas Technology

Part Name
Description
Manufacturer
UPD17P401CG-XXX-3B9 Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
P0A0 to P0A3 : Input/output ports
P0B0 to P0B3 : Input/output ports
P0C0 to P0C3 : Input/output ports
P0D0 to P0D3 : Output ports
P1A0 to P1A3 : Output ports
P1B0 to P1B3 : Input/output ports
P1C0 to P1C3 : Output ports
P1D0 to P1D3 : Output ports
P2A0 to P2A3 : Input/output ports
KS0 to KS15 : Key source signal outputs
K0 to K3
: Key source signal return inputs
LCD0 to LCD35 : LCD segment signal outputs
COM0 to COM3: LCD common signal outputs
CKOUT
: Sub-clock output
RLSSTOP
: Stop mode release input
CE
: Chip enable input
INT0, INT1
: External interrupt inputs
ADC
: A/D converter input
SDA
: Serial data input/output
µPD17P401
SCL
: Serial clock input/output
SI0, SI1
: Serial data inputs
SO0, SO1
: Serial data outputs
SCK0, SCK1 : Serial clock input/outputs
XIN, XOUT
: Main clock oscillator
XTIN, XTOUT : Sub-clock oscillator
OSCIN, OSCOUT : IDC oscillator
IDC0 to IDC2 : IDC display signal outputs
BLK0 to BLK2 : Blanking signal outputs
HSYNC
: Horizontal synchronization
signal input
VSYNC
: Vertical synchronization signal
input
CLK
: PROM clock input
MD0 to MD3 : PROM mode selection inputs
D0 to D7
: PROM data input/outputs
VPP
: PROM power supply
VDD1, VDD2
: Power supply
GND
: Ground
4

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