UPD17P134A View Datasheet(PDF) - NEC => Renesas Technology
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UPD17P134A Datasheet PDF : 292 Pages
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CHAPTER 8 GENERAL REGISTER (GR) ........................................................................................... 67
8.1 GENERAL REGISTER CONFIGURATION ............................................................................................ 67
8.2 FUNCTIONS OF THE GENERAL REGISTER ....................................................................................... 67
CHAPTER 9 REGISTER FILE (RF) ...................................................................................................... 69
9.1 REGISTER FILE CONFIGURATION ...................................................................................................... 69
9.1.1 Configuration of the Register File ............................................................................................. 69
9.1.2 Relationship between the Register File and Data Memory ..................................................... 69
9.2 FUNCTIONS OF THE REGISTER FILE ................................................................................................. 70
9.2.1 Functions of the Register File ................................................................................................... 70
9.2.2 Functions of Control Register ................................................................................................... 70
9.2.3 Register File Manipulation Instructions .................................................................................... 71
9.3 CONTROL REGISTER ............................................................................................................................ 72
9.4 NOTES CONCERNING USE OF THE REGISTER FILE....................................................................... 73
9.4.1 Notes Concerning Operation of the Control Register (Read-Only and Unused Registers) ... 73
9.4.2 Register File Symbol Definitions and Reserved Words ........................................................... 73
CHAPTER 10 DATA BUFFER (DBF) ................................................................................................... 77
10.1 DATA BUFFER CONFIGURATION ........................................................................................................ 77
10.2 FUNCTIONS OF THE DATA BUFFER ................................................................................................... 78
10.2.1 Data Buffer and Peripheral Hardware ...................................................................................... 79
10.2.2 Data Transfer with Peripheral Hardware .................................................................................. 80
10.2.3 Table Reference ......................................................................................................................... 81
CHAPTER 11 ARITHMETIC AND LOGIC UNIT (ALU) ....................................................................... 83
11.1 ALU BLOCK CONFIGURATION ............................................................................................................ 83
11.2 FUNCTIONS OF THE ALU BLOCK ....................................................................................................... 83
11.2.1 Functions of the ALU ................................................................................................................. 83
11.2.2 Functions of Temporary Registers A and B .............................................................................. 88
11.2.3 Functions of the Status Flip-flop ............................................................................................... 88
11.2.4 Operations in 4-Bit Binary ......................................................................................................... 89
11.2.5 Operations in BCD ..................................................................................................................... 89
11.2.6 Operations in the ALU Block ..................................................................................................... 90
11.3 ARITHMETIC OPERATIONS (ADDITION AND SUBTRACTION IN 4-BIT BINARY AND BCD) ....... 91
11.3.1 Addition and Subtraction When CMP = 0 and BCD = 0 .......................................................... 91
11.3.2 Addition and Subtraction When CMP = 1 and BCD = 0 .......................................................... 91
11.3.3 Addition and Subtraction When CMP = 0 and BCD = 1 .......................................................... 92
11.3.4 Addition and Subtraction When CMP = 1 and BCD = 1 .......................................................... 92
11.3.5 Notes Concerning Use of Arithmetic Operations ..................................................................... 92
11.4 LOGICAL OPERATIONS ........................................................................................................................ 93
11.5 BIT JUDGEMENTS ................................................................................................................................. 94
11.5.1 TRUE (1) Bit Judgement ........................................................................................................... 94
11.5.2 FALSE (0) Bit Judgement ......................................................................................................... 95
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