UPD17P134A View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

Manufacturer

UPD17P134A

4-BIT SINGLE-CHIP MICROCONTROLLER

NEC => Renesas Technology 

TABLE OF CONTENTS

CHAPTER 1 GENERAL DESCRIPTION ................................................................................................. 1

1.1 FUNCTION LIST ........................................................................................................................................ 2

1.2 ORDERING INFORMATION ..................................................................................................................... 3

1.3 BLOCK DIAGRAM .................................................................................................................................... 4

1.4 PIN CONFIGURATION (TOP VIEW) ........................................................................................................ 5

CHAPTER 2 PIN FUNCTIONS ............................................................................................................... 9

2.1 PIN FUNCTIONS ....................................................................................................................................... 9

2.2 PIN INPUT/OUTPUT CIRCUIT ............................................................................................................... 11

2.3 PROCESSING OF UNUSED PINS ......................................................................................................... 14

2.4 NOTES ON USING RESET PIN AND P1B0 PIN ................................................................................... 15

CHAPTER 3 PROGRAM COUNTER (PC) ........................................................................................... 17

3.1 PROGRAM COUNTER CONFIGURATION ............................................................................................ 17

3.2 PROGRAM COUNTER OPERATION ..................................................................................................... 17

3.2.1 At Reset ..................................................................................................................................... 18

3.2.2 During Execution of the Branch Instruction (BR) ..................................................................... 18

3.2.3 During Execution of Subroutine Calls (CALL) .......................................................................... 19

3.2.4 During Execution of Return Instructions (RET, RETSK, RETI) ............................................... 20

3.2.5 During Table Reference (MOVT) .............................................................................................. 20

3.2.6 During Execution of Skip Instructions (SKE, SKGE, SKLT, SKNE, SKT, SKF) ...................... 21

3.2.7 When an Interrupt Is Received ................................................................................................. 21

CHAPTER 4 PROGRAM MEMORY (ROM).......................................................................................... 23

4.1 PROGRAM MEMORY CONFIGURATION ............................................................................................. 23

4.2 PROGRAM MEMORY USAGE ............................................................................................................... 24

4.2.1 Flow of the Program .................................................................................................................. 24

4.2.2 Table Reference ......................................................................................................................... 27

CHAPTER 5 DATA MEMORY (RAM) .................................................................................................... 31

5.1 DATA MEMORY CONFIGURATION ....................................................................................................... 31

5.1.1 System Register (SYSREG) ..................................................................................................... 32

5.1.2 Data Buffer (DBF) ...................................................................................................................... 32

5.1.3 General Register (GR) .............................................................................................................. 33

5.1.4 Port Registers ............................................................................................................................ 33

5.1.5 General Data Memory ............................................................................................................... 34

5.1.6 Unmounted Data Memory ......................................................................................................... 34

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