UPD62 View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
Manufacturer
UPD62
NEC => Renesas Technology
UPD62 Datasheet PDF : 64 Pages
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µPD62
1. PIN FUNCTIONS
1.1 List of Pin Functions
Pin No.
1
2
15-20
3
4
5
6
7
8
9
10
11-14
Symbol
Function
KI/O0-KI/O7
These pins refer to the 8-bit I/O ports. I/O switching can
be made in 8-bit units.
In INPUT mode, a pull-down resistor is added.
In OUTPUT mode, they can be used as the key scan
output of the key matrix.
S0
Refers to the input port.
Can also be used as the key return input of the key
matrix.
In INPUT mode, the availability of the pull-down resistor
of the S0 and S1 ports can be specified by software in
terms in 2-bit units.
If INPUT mode is canceled by software, this pin is placed
in OFF mode and enters the high-impedance state.
S1/LED
Refers to the I/O port.
In INPUT mode (S1), this pin can also be used as the key
return input of the key matrix.
The availability of the pull-down resistor of the S0 and S1
ports can be specified by software in 2-bit units.
In OUTPUT mode (LED), it becomes the remote control
transmission display output (active low). When the
remote control carrier is output from the REM output, this
pin outputs the low level from the LED output synchronously
with the REM signal.
REM
Refers to the infrared remote control transmission output.
The output is active high.
Carrier frequency: fX/8, fX/64, fX/96, high-level, fX/16,
fX/128, fX/192 (usable on software)
VDD
Refers to the power supply.
XOUT
XIN
GND
RESET
These pins are connected to system clock ceramic
resonators.
Refers to the ground.
Normally, this pin is a system reset input. By inputting
a low level, the CPU can be reset. When resetting with
the POC circuit (mask option) a low level is output. A
pull-up resistor is incorporated.
KI0-KI3Note 2
These pins refer to the 4-bit input ports.
They can be used as the key return input of the key
matrix.
The use of the pull-down resistor can be specified by
software in 4-bit units.
Output Format
CMOS
push-pullNote 1
—
CMOS push-pull
CMOS push-pull
—
—
—
—
—
When Reset
High-level output
High-impedance
(OFF mode)
High-level output
(LED)
Low-level output
—
Low level
(oscillation stopped)
—
—
Input (low-level)
Notes 1. Be careful about this because the drive capability of the low-level output side is held low.
2. In order to prevent malfunction, be sure to input a low level to more than one of pins KI0 to KI3 when
reset is released (when RESET pin changes from low level to high level, or POC is released due to
supply voltage startup).
6
Data Sheet U14208EJ1V0DS00
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