UPD6345GS View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
Manufacturer
UPD6345GS Datasheet PDF : 16 Pages
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BLOCK DIAGRAM
µPD6345
O1
O2
O3
O4
O5
O6
O7
O8
EN
100 kΩ
P1
P2
P3
P4
P5
P6
P7
P8
LAT
100 kΩ
SIN
S1
S2
S3
S4
S5
S6
S7
S8
SO
100 kΩ
RES
SCK
100 kΩ
100 kΩ
P1 to P8 ; Latch Circuits
S1 to S8 ; 8-bit Shift register
TRUTH TABLE
SCK
EN
RES
LAT
SIN
OUT
O1
On
SO*1
Note
H
H
H
L
High Impedance
On – 1
S7 SCK = CLOCK
EN = Output Enable
H
H
H
H
L
On – 1
RES= Reset
S7 LAT= Latch Enable
SIN = Serial data Input
H
H
L*2
*
NO CHANGE NO CHANGE S7 OUT = Driver Output
SO = Serial data Output
L
H
*
*
High Impedance High Impedance S7 * = H or L
H = High level
L = Low level
*
*
*
*
NO CHANGE NO CHANGE S8
*
*
L
H
*
High Impedance High Impedance L
*
H
L
*
NO CHANGE NO CHANGE L
*1) Seventh data S7 of shift register is loaded to eighth data S8 on positive-going transition of clock, and is output
to Serial data Output pin.
*2) Shift register operates normally.
3
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