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UPD64A View Datasheet(PDF) - NEC => Renesas Technology

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Description
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UPD64A Datasheet PDF : 64 Pages
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µPD64A, 65
3. PORT REGISTERS (PX)
The KI/O port, the KI port, the special ports (S0, S1/LED, S2), and the control registers are treated as port registers.
Port register values after reset are shown below.
Figure 3-1. Port Register Configuration
KI/O7
KI3
0
0
Port register
After reset
P0
FFH
P10
P00
KI/O6
KI/O5
KI/O4
KI/O3
P1
KI/O2
KI/O1
KI/O0
×FHNote
P11
P01
KI2
KI1
KI0
S1/LED
S0
S2
1
P3 (control register 0)
03H
P13
P03
DP10
DP9
DP8
TCTL CARY MOD1 MOD0
P4 (control register 1)
26H
P14
P04
0
KI
pull-down
S0/S1
pull-down
S2
S1/LED mode KI/O mode
STOP release
S0 mode
Note ×: Value based on the KI pin state
Table 3-1. Relationship Between Ports and Read/Write
Port Name
KI/O
KI
S0
S1/LED
S2
Input Mode
Read
Write
Pin state
Output latch
Pin state
Pin state
Pin state
Pin state
Output Mode
Read
Write
Output latch Output latch
Note
Pin state
Note When in OFF mode, “1” is always read.
14
Data Sheet U14380EJ3V0DS00

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