DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

UPD6604GS-XXX-GJG-E1 View Datasheet(PDF) - NEC => Renesas Technology

Part Name
Description
Manufacturer
UPD6604GS-XXX-GJG-E1 Datasheet PDF : 64 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
µPD6604
3.3 Control Register 0 (P3)
Control register 0 consists of 8 bits. The contents that can be controlled are as shown below.
When reset, the register becomes 0000 0011B.
Table 3-4. Control Register 0 (P3)
Bit
Name
b7
Set
0
value
1
When reset
Fixed
to “0”
0
b6
Fixed
to “0”
0
b5
b4
b3
DP (Data pointer) TCTL
DP9
DP8
0
0
1/1
1
1
1/2
0
0
0
b2
CARY
b1
MOD1
b0
MOD0
ON
OFF
0
See Table 3-5.
1
1
b0, b1 : These bits specify the carrier frequency and duty ratio of the REM output.
b2 : This bit specifies the availability of the carrier of the frequency specified by b0 and b1.
“0” = ON (with carrier); “1” = OFF (without carrier; high level)
b3 : This bit changes the carrier frequency and the timer clock’s frequency division ratio.
“0” = 1/1 (carrier frequency: the specified value of b0 and b1; timer clock: fOSC/8)
“1” = 1/2 (carrier frequency: half of the specified value of b0 and b1; timer clock: fOSC/16)
Table 3-5. Timer Clock and Carrier Frequency Setup
b3
0
1
b2
0
1
0
1
b1
0
0
1
1
×
0
0
1
1
×
b0
0
1
0
1
×
0
1
0
1
×
Timer Clock
fOSC/8
fOSC/16
Carrier Frequency (Duty Ratio)
fOSC (Duty 1/2)
fOSC/8 (Duty 1/2)
fOSC/12 (Duty 1/2)
fOSC/12 (Duty 1/3)
Without carrier (high level)
fOSC/2 (Duty 1/2)
fOSC/16 (Duty 1/2)
fOSC/24 (Duty 1/2)
fOSC/24 (Duty 1/3)
Without carrier (high level)
b4 and b5 : These bits specify the high-order 2 bits (DP8 and DP9) of ROM’s data pointer.
Remark ×: don’t care
Data Sheet U11281EJ3V0DS00
17

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]