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UPD75112FGF-XXX-3BE View Datasheet(PDF) - NEC => Renesas Technology

Part Name
Description
Manufacturer
UPD75112FGF-XXX-3BE
NEC
NEC => Renesas Technology NEC
UPD75112FGF-XXX-3BE Datasheet PDF : 78 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
µPD75108F,75112F,75116F
3.2 OTHER PINS
Pin Name
Input/Output
PTH00 to PTH03
Input
TI0
Input
TI1
PTO0
PTO1
Input/output
SCK
Input/output
SO
Input/output
SI
Input
Dual-
Function Pin
Function
Variable threshold voltage 4-bit analog input port.
External event pulse input to timer/event counter. Or edge
detection vectored interrupt input or 1-bit input is also
possible.
P20
Timer/event counter output
P21
P01
Serial clock input/output
P02
Serial data output
P03
Serial data input
After Reset
Input
Input
Input
Input
INT4
Input
P00
Edge detection vector interrupt input (detection of both
rising and falling edges)
Input
INT0
INT1
INT2
INT3
PCL
X1, X2
RESET
NC*2
VDD
VSS
Input
Input
Input/output
Input
P10
Edge detection vector interrupt input (detection edge se-
P11
lectable)
P12
Edge detection testable input (rising edge detection)
P13
P22
Clock output
System clock oscillation crystal/ceramic connection pin.
When an external clock is used, the clock is input to X1 and
the inverted clock is input to X2.
System reset input (low-level active).
No Connection
Positive power supply
GND potential
Input
Input
Input
I/O Circuit
Type *1
N
B
E
F
E
B
B
B
B
E
B
* 1. q : Schmitt trigger input
2. When sharing a print board with µPD75P116, NC pin should be connected to VDD.
9

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