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UPD75112GF-XXX-3BE View Datasheet(PDF) - NEC => Renesas Technology

Part Name
Description
Manufacturer
UPD75112GF-XXX-3BE
NEC
NEC => Renesas Technology NEC
UPD75112GF-XXX-3BE Datasheet PDF : 56 Pages
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3.3 Pin Input/Output Circuits
µPD75116(A) pin input/output crcuit are shown in sche-
matic form.
Figure 3-1 Pin Input/Output Circuits
Type A
VDD
P-ch
IN
N-ch
Type F
µPD75112(A), 75116(A)
data
output
disable
Type D
Type B
IN/OUT
CMOS specified input buffer
Type B
IN
Schmitt triggered-input with hysteresis characteristics
Type D
data
output
disable
VDD
P-ch
N-ch
OUT
Input/output circuit consisting of a Type D push-pull output
and a Type B Schmitt-triggered input.
Type M
VDD
Pull-Up Register (Mask Option)
IN/OUT
data
output
disable
N-ch (+6 V
Withstand)
Middle-High Voltage Input Buffer (+6 V Withstand)
Push-pull output which can be set at output high impedance
(with both P-ch an N-ch set to OFF)
Type E
data
output
disable
Type D
IN/OUT
Type N
Comparator
IN
+
Type A
Input/output circuit consisting of a Type D push-pull output
and a Type A input buffer
VREF (Threshold Voltage)
9

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