UPD75P0076GT View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

Manufacturer

UPD75P0076GT

4-BIT SINGLE-CHIP MICROCONTROLLER

NEC => Renesas Technology 

µPD75P0076

4.2 Setting of Stack Bank Selection (SBS) Register

Use the stack bank selection register to switch between the Mk I mode and the Mk II mode. Figure 4-1 shows the format

for doing this.

The stack bank selection register is set using a 4-bit memory manipulation instruction. When using the Mk I mode, be

sure to initialize the stack bank selection register to 100xBNote at the beginning of the program. When using the Mk II mode,

be sure to initialize it to 000xBNote.

Note Set the desired value for x.

Figure 4-1. Format of Stack Bank Selection Register

Address 3

2

1

0 Symbol

F84H SBS3 SBS2 SBS1 SBS0 SBS

Stack area specification

0

0 Memory bank 0

0

1 Memory bank 1

1

0

Setting prohibited

1

1

0 Be sure to enter “0” for bit 2.

Mode selection specification

0 Mk II mode

1 Mk I mode

Cautions 1. SBS3 is set to “1” after RESET input, and consequently the CPU operates in the Mk I mode. When

using instructions for the Mk II mode, set SBS3 to “0” to enter the Mk II mode before using the

instructions.

2. When using the Mk II mode, execute a subroutine call instruction and an interrupt instruction after

RESET input and after setting the stack bank selection register.

14

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