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UPD75P0076CU View Datasheet(PDF) - NEC => Renesas Technology

Part Name
Description
Manufacturer
UPD75P0076CU
NEC
NEC => Renesas Technology NEC
UPD75P0076CU Datasheet PDF : 62 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
µPD75P0076
3. PIN FUNCTIONS
3.1 Port Pins
Pin name
P00
P01
I/O Alternate function
Function
I INT4
I/O SCK
This is a 4-bit input port (PORT0).
For P01 to P03, on-chip pull-up resistors are
software-specifiable in 3-bit units.
8-bit
accessible
Not
available
After
reset
Input
I/O circuit
typeNote 1
<B>
<F>-A
P02
I/O SO/SB0
<F>-B
P03
I/O SI/SB1
<M>-C
P10
I INT0
This is a 4-bit input port (PORT1).
Not
Input
<B>-C
Connections of on-chip pull-up resistors are
available
P11
INT1
software-specifiable in 4-bit units. P10/INT0
can select a noise elimination circuit.
P12
TI1/INT2
P13
TI0
P20
I/O PTO0
This is a 4-bit I/O port (PORT2).
Not
Input
E-B
Connections of on-chip pull-up resistors are
available
P21
PTO1
software-specifiable in 4-bit units.
P22
PCL
P23
BUZ
P30
I/O MD0
P31
MD1
P32
MD2
This is a programmable 4-bit I/O port (PORT3).
Not
Input
E-B
Input and output can be specified in single-bit available
units. Connections of on-chip pull-up resistors
are software-specifiable in 4-bit units.
P33
MD3
P40Note 2
P41Note 2
P42Note 2
I/O D0
D1
D2
This is an N-ch open-drain 4-bit I/O port
Available
High
(PORT4). In the open-drain mode, withstands
impedance M-E
up to 13 V. Also used as data I/O pin
(lower 4 bits) for program memory (PROM)
write/verify.
P43Note 2
D3
P50Note 2
P51Note 2
P52Note 2
I/O D4
D5
D6
This is an N-ch open-drain 4-bit I/O port
(PORT5). In the open-drain mode, withstands
up to 13 V. Also used as data I/O pin
(upper 4 bits) for program memory (PROM)
write/verify.
High
impedance M-E
P53Note 2
D7
P60
I/O KR0/AN4
This is a programmable 4-bit I/O port (PORT6).
Not
Input
<Y>-D
Input and output can be specified in single-bit available
P61
KR1/AN5
units. Connections of on-chip pull-up resistors
are software-specifiable in 4-bit units.
P62
KR2/AN6
P63
KR3/AN7
P110
P111
I AN0
AN1
This is a 4-bit input port (PORT11).
Not
Input
Y-A
available
P112
AN2
P113
AN3
Notes 1. Circuit types enclosed in brackets indicate Schmitt triggered inputs.
2. Low-level input current leakage increases when input instructions or bit manipulation instructions are executed.
6

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