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UPD75P3018AGK-9EU View Datasheet(PDF) - NEC => Renesas Technology

Part Name
Description
Manufacturer
UPD75P3018AGK-9EU
NEC
NEC => Renesas Technology NEC
UPD75P3018AGK-9EU Datasheet PDF : 64 Pages
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µPD75P3018A
4.2 Setting of Stack Bank Selection Register (SBS)
Use the stack bank selection register to switch between Mk I mode and Mk II mode. Figure 4-1 shows the format for doing
this.
The stack bank selection register is set using a 4-bit memory manipulation instruction. When using the Mk I mode, be
sure to initialize the stack bank selection register to 10XXBNote at the beginning of the program. When using the Mk II mode,
be sure to initialize it to 00XXBNote.
Note Set the desired value for XX.
Figure 4-1. Format of Stack Bank Selection Register
Address 3
2
1
0 Symbol
F84H SBS3 SBS2 SBS1 SBS0 SBS
Stack area specification
0
0 Memory bank 0
0
1 Memory bank 1
1
0 Memory bank 2
1
1 Memory bank 3
0 Be sure to set bit 2 to 0.
Mode selection specification
0 Mk II mode
1 Mk I mode
Cautions 1. SBS3 is set to “1” after RESET input, and consequently the CPU operates in Mk I mode. When using
instructions for Mk II mode, set SBS3 to “0” and set Mk II mode before using the instructions.
2. When using Mk II mode, execute a subroutine call instruction and an interrupt instruction after
RESET input and after setting the stack bank selection register.
14
Data Sheet U11917EJ2V0DS00

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