UPD75P3018A View Datasheet(PDF) - NEC => Renesas Technology
Part Name
Description
Manufacturer
UPD75P3018A Datasheet PDF : 64 Pages
| |||
µPD75P3018A
3. PIN FUNCTIONS
3.1 Port Pins (1/2)
Pin Name
P00
P01
P02
P03
P10
P11
P12
P13
P20
P21
P22
P23
P30
P31
P32
P33
P40Note 2
P41Note 2
P42Note 2
P43Note 2
P50Note 2
P51Note 2
P52Note 2
P53Note 2
I/O Alternate Function
Function
Input INT4
SCK
SO/SB0
This is a 4-bit input port (PORT0).
P01 to P03 are 3-bit pins for which an internal
pull-up resistor connection can be specified
by software.
8-bit
I/O
—
After Reset I/O Circuit
TypeNote 1
Input
<B>
<F>-A
<F>-B
SI/SB1
<M>-C
Input INT0
This is a 4-bit input port (PORT1).
—
Input
<B>-C
These are 4-bit pins for which an internal pull-up
INT1
resistor connection can be specified by software.
P10/INT0 can select noise elimination circuit.
TI1/TI2/INT2
TI0
I/O PTO0
PTO1
This is a 4-bit I/O port (PORT2).
—
Input
E-B
These are 4-bit pins for which an internal pull-up
resistor connection can be specified by software.
PCL/PTO2
BUZ
I/O LCDCL/MD0
This is a programmable 4-bit I/O port (PORT3).
—
Input
E-B
Input and output in single-bit units can be specified.
SYNC/MD1
When set for 4-bit units, an internal pull-up resistor
connection can be specified by software.
MD2
MD3
I/O D0
D1
D2
This is an N-ch open-drain 4-bit I/O port (PORT4).
When set to open-drain, voltage is 13 V.
Also functions as data I/O pin (low-order 4 bits)
for program memory (PROM) write/verify.
√
High
M-E
impedance
D3
I/O D4
D5
D6
This is an N-ch open-drain 4-bit I/O port (PORT5).
When set to open-drain, voltage is 13 V.
Also functions as data I/O pin (high-order 4 bits)
for program memory (PROM) write/verify.
High
M-E
impedance
D7
Notes 1. Circuit types enclosed in brackets indicate Schmitt trigger input.
2. Low-level input leakage current increases when input instructions or bit manipulation instructions are executed.
6
Data Sheet U11917EJ2V0DS00
Share Link: 