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UPD75P3018A View Datasheet(PDF) - NEC => Renesas Technology

Part Name
Description
Manufacturer
UPD75P3018A
NEC
NEC => Renesas Technology NEC
UPD75P3018A Datasheet PDF : 64 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
µPD75P3018A
3.1 Port Pins (2/2)
Pin Name
P60
P61
P62
I/O Alternate Function
Function
8-bit After Reset I/O Circuit
I/O
TypeNote 1
I/O KR0
KR1
KR2
This is a programmable 4-bit I/O port (PORT6).
Input and output in single-bit units can be specified.
When set for 4-bit units, an internal pull-up resistor
connection can be specified by software.
Input
<F>-A
P63
KR3
P70
I/O KR4
P71
KR5
This is a 4-bit I/O port (PORT7).
When set for 4-bit units, an internal pull-up resistor
connection can be specified by software.
Input
<F>-A
P72
KR6
P73
KR7
BP0
Output S24
BP1
S25
1-bit output port (BIT PORT). These pins are also
Note 2
H-A
used as segment output pin.
BP2
S26
BP3
S27
BP4
Output S28
BP5
S29
BP6
S30
BP7
S31
Notes 1. Circuit types enclosed in brackets indicate Schmitt trigger input.
2. VLC1 is selected as the input source for BP0 to BP7. The output level varies depending on the external circuit
for BP0 to BP7 and VLC1.
Example: As shown below, BP0 to BP7 are mutually connected via the µPD75P3018A, so the output levels of BP0 to BP7
are determined by the sizes of R1, R2, and R3.
VDD
VLC1
R1
ON
ON
µ PD75P3018A
R2
BP0
BP1
R3
Data Sheet U11917EJ2V0DS00
7

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