µPD77113A, 77114
7. MEMORY MAP
A Harvard architecture, in which the instruction memory space and data memory space are separated is
employed.
7.1 Instruction Memory
7.1.1 Instruction memory map
The instruction memory space consists of 64K words × 32 bits, and the capacity and type of the memory differ
depending on the product.
µPD77113A, 77114
0 x FFFF
Internal instruction
ROM
(48K words)
0x4000
0 x 3FFF
System
0x1000
0 x 0 F F F Internal instruction RAM
0x0240
(3.5K words)
0x023F
0x0200
Vector area (64 words)
0 x 0 1FF
0x0100
System
0 x 0 0 F F Boot-up ROM
0x0000
(256 words)
Caution Programs and data cannot be placed at addresses reserved for the system, nor can these
addresses be accessed. If these addresses are accessed, the normal operation of the device
cannot be guaranteed.
Data Sheet U14373EJ3V0DS
25