UPD784938GF-XXX-3BA View Datasheet(PDF) - NEC => Renesas Technology
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Description
Manufacturer
UPD784938GF-XXX-3BA Datasheet PDF : 733 Pages
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LIST OF FIGURES (1/12)
Figure No.
Title
Page
2-1 Pin Input/Output Circuits ............................................................................................................................. 64
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12
3-13
µPD784935 Memory Map ............................................................................................................................ 69
µPD784936 Memory Map ............................................................................................................................ 70
µPD784937 Memory Map ............................................................................................................................ 71
µPD784938, 78F4938 Memory Map ........................................................................................................... 72
Internal RAM Memory Map ......................................................................................................................... 79
Internal Memory Size Switching Register (IMS) ......................................................................................... 82
Program Counter (PC) Format .................................................................................................................... 83
Program Status Word (PSW) Format ......................................................................................................... 83
Stack Pointer (SP) Format .......................................................................................................................... 88
Data Saved to Stack Area ........................................................................................................................... 89
Data Restored from Stack Area .................................................................................................................. 90
General-Purpose Register Format .............................................................................................................. 92
General-Purpose Register Addresses ........................................................................................................ 93
4-1 Clock Generator Block Diagram .................................................................................................................. 105
4-2 Clock Oscillator External Circuitry .............................................................................................................. 106
4-3 Standby Control Register (STBC) Format .................................................................................................. 108
4-4 Oscillation Stabilization Time Specification Register (OSTS) Format ....................................................... 109
4-5 Signal Extraction with External Clock Input ................................................................................................ 111
4-6 Cautions on Resonator Connection ............................................................................................................ 112
4-7 Incorrect Example of Resonator Connection .............................................................................................. 113
5-1 Regulator Peripherals Block Diagram ......................................................................................................... 115
6-1
6-2
6-3
6-4
6-5
6-6
6-7
6-8
6-9
6-10
6-11
6-12
6-13
6-14
6-15
Port Configuration ........................................................................................................................................ 117
Port 0 Block Diagram ................................................................................................................................... 119
Port 0 Mode Register (PM0) Format ........................................................................................................... 120
Port Specified as Output Port ..................................................................................................................... 121
Port Specified as Input Port ........................................................................................................................ 122
Pull-Up Resistor Option Register L (PUOL) Format .................................................................................. 123
Pull-Up Resistor Specification (Port 0) ....................................................................................................... 124
Example of Transistor Drive ........................................................................................................................ 125
P12 (Port 1) Block Diagram ........................................................................................................................ 127
P13 (Port 1) Block Diagram ........................................................................................................................ 128
P14 (Port 1) Block Diagram ........................................................................................................................ 129
Block Diagram of P10, P11, and P15 to P17 (Port 1) ................................................................................ 130
Port 1 Mode Register (PM1) Format ........................................................................................................... 131
Port 1 Mode Control Register (PMC1) Format ........................................................................................... 131
Port Specified as Output Port ..................................................................................................................... 132
Preliminary User’s Manual U13987EJ1V0UM00
23
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