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V436616Y24VXTG-10PC View Datasheet(PDF) - Mosel Vitelic Corporation

Part Name
Description
Manufacturer
V436616Y24VXTG-10PC
Mosel-Vitelic
Mosel Vitelic Corporation  Mosel-Vitelic
V436616Y24VXTG-10PC Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MOSEL VITELIC
V436616Y24V
SPD-Table for modules: (Continued)
Byte Num-
ber
Function Described
SPD Entry Value
28
Minimum Row Active to Row Active Delay
tRRD
29
Minimum RAS to CAS Delay tRCD
30
Minimum RAS Pulse Width tRAS
31
Module Bank Density (Per Bank)
14 ns/15 ns/16 ns
15 ns/20 ns
42 ns/45 ns
128 Mbyte
32
SDRAM Input Setup Time
1.5 ns
33
SDRAM Input Hold Time
0.8 ns
34
SDRAM Data Input Setup Time
1.5 ns
35
SDRAM Data Input Hold Time
0.8 ns
36-61
Superset Information (May be used in Future)
62
SPD Revision
Revision 2
63
Checksum for Bytes 0 - 62
64
Manufacturer’s JEDEC ID Code
Mosel Vitelic
65-71
Manufacturer’s JEDEC ID Code (cont.)
72
Manufacturing Location
1 = US, 2 = Taiwan
73-90
Module Part Number (ASCII)
V436616Y24V
91-92
PCB Identification Code
Current PCB Revision
93
Assembly Manufacturing Date (Year)
Binary Coded year (BCD)
94
Assembly Manufacturing Date (Week)
Binary Coded week (BCD)
95-98
Assembly Serial Number
byte 95 = LSB, byte 98 =
MSB
99-125 Reserved
126
Intel Specification for Frequency
127
Supported frequency
128+
Unused Storage Location
-75PC
0E
0F
2A
20
15
08
15
08
00
02
E4
40
00
00
64
00
Hex Value
-75
0F
14
2D
20
15
08
15
08
00
02
29
40
00
00
64
00
-10PC
10
14
30
20
20
10
20
10
00
12
9A
40
00
00
64
00
DC Characteristics
TA = 0°C to 70°C; VSS = 0 V; VDD, VDDQ = 3.3V ± 0.3V
Symbol Parameter
VIH
Input High Voltage
VIL
Input Low Voltage
VOH
Output High Voltage (IOUT = –4.0 mA)
VOL
Output Low Voltage (IOUT = 4.0 mA)
Limit Values
Min.
Max.
2.0
–0.5
VCC+0.3
0.8
2.4
0.4
Unit
V
V
V
V
V436616Y24V Rev. 1.0 January 2002
5

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