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VSC7961YD View Datasheet(PDF) - Vitesse Semiconductor

Part Name
Description
Manufacturer
VSC7961YD Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
VITESSE
SEMICONDUCTOR CORPORATION
3.125Gb/s PECL Limiting Amplifier with LOS Detect
Advance Product Information
VSC7961
Package Pin Descriptions
Figure 1: Pin Diagram
Top View
TSSOP-16 Package
CZ1
1
16
CZ2
2
15
GND
3
14
IN+
4
13
IN-
5
VSC7961
12
GND
6
11
NC
7
10
TH
8
9
NC
SQUELCH
VCC
OUT+
OUT-
VCC
LOS
LOS
Table 5: Pin Identifications
Pin Name Pin No.
Description
CZ1
CZ2
GND
IN+
IN-
GND
NC
TH
LOS
LOS
VCC
OUT-
OUT+
VCC
SQUELCH
NC
1
Offset Correction Loop Capacitor. Place capacitor between this pin and CZ2 to alter time constant
of offset correction loop. See Detailed Description section.
2
Offset Correction Loop Capacitor. Place capacitor between this pin and CZ1 to alter time constant
of offset correction loop. See Detailed Description section.
3
Supply Ground
4
Noninverted Input Signal
5
Inverted Input Signal
6
Supply Ground
7
This pin may be either connected to ground of left unconnected. This pin does not effet the
performance of the device.
8
Loss of Signal (LOS) Threshold. Connect a resistor from this pin to ground to set the input signal
level at which LOS outputs will be asserted. See Application Information section.
9
Inverted Loss of Signal Output. LOS is HIGH for input signals above the threshold programmed by
TH. See Detailed Description section.
10
Noninverted Loss of Signal Output. LOS is LOW for input signals above the threshold
programmed by TH. See Detailed Description section.
11
Power Supply
12
Inverted Data Output
13
Noninverted Data Output
14
Power Supply
15
Squelch Input. Squelch is disabled if this pin is unconnected or set LOW. When SQUELCH is
HIGH, OUT+ and OUT- are forced to static levels. See Detailed Description section.
16
No Connection
Page 4
© VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano Camarillo, CA 93012
Tel: (800) VITESSE FAX: (805) 987-5896 Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52360-0, Rev 2.0
02/09/01

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