VT82C42 View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

VT82C42

VT82C42 KEYBOARD CONTROLLER

Unspecified 

VIA Technologies, Inc.

VT82C42

XTAL1

CLOCK (1-12 MHz)

XTAL2

Figure 6. Clocking from other clock source for VT82C42

2. A transmission from Keyboard Controller to external device

* bitp means parity bit, bits means stop bit.

* CLOCK is driven by external device except the leading 250µs & ending 60µs low time.

* DATA is driven by KBC except the low time after the stop bit.

* If the maximum (a), (b), or (c) cannot be met, KBC will terminate the transmission with a timeout error.

CLOCK

DATA

250us

15ms max.(a)

90us

.......

30us min.

2ms max. (b)

6us max.

60us

wait for response end

20ms max. (c)

bit0 bit1 bit2 ....... bit7 bitp bits

Fig 7.Timing from KBC to external device

3. A transmission from external device to Keyboard Controller

* CLOCK is driven by external device except the ending 60µs low time.

* DATA is driven by external devices.

* If the maximum (a) cannot be met, KBC will terminate the transmission with a timeout error.

CLOCK

DATA

3us min.

.......

30us min.

2ms max. (a)

3us min.

60us

8us

bit0 bit1 bit2

....... bit7 bitp

Fig 8.Timing from external device to KBC

4. Upon recieving commands which program the output ports from the host , the controller will put the

corresponding data to the output port within 6 clocks. There is one exception, P20 is connected to system reset

on a typical desktop application. For software compatibility the output of P20 is delayed for 4~8µs.

-8-

Share Link: